On Fri Dec 19, 2025 at 11:46 AM CET, Biju wrote: > From: Biju Das <[email protected]> > > On RZ/G3E SMARC EVK using PSCI, s2ram powers down the SoC. Testing ADV7535 > IRQ configured as edge-triggered interrupt on RZ/G3E SMARC EVK shows that > it is missing HPD IRQ during system resume, as the status change occurs > before the IRQ/pincontrol resume. Once the status bit is set, there won't > be any further IRQ unless the status bit is cleared. > > Clear any pending HPD IRQs before powering on the ADV7535 device to > deliver HPD interrupts after resume(). > > Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Luca Ceresoli <[email protected]> -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
