Currently we store several settings in the configuration database. Some of them are incorrect or not completely matching the expected configuration settings. Others are directly derivable from the UBWC version. Rework how we handle the values in the database, trimming it down to the UBWC version, HBB and several flags.
Note: I don't have a good merge strategy for the sieres, it depends on other SoC/UBWC patches [1], which are probably going to be merged through linux-media. Any suggestions are appreciated. Maybe the best option would be to: - merge SoC patches from that series and this series to the Bjorn's tree - create an immutable tag to be used by linux-media and drm/msm - Merge relevant drm/msm and linux-media patches to corresponding trees after merging the immutable tag - Merge the rest of SoC patches in the next cycle after drm/msm and media changes are in WDYT? [1] https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> --- Changes in v3: - Corrected UWBC_STATIC programming for MDSS 5.x platforms (Konrad) - Switched MDSS 6.x+ to qcom_ubwc_min_acc_length_64b() too - Added qcom_ubwc_enable_amsbc() helper - Reworked the DPU handling of UBWC config, making it simpler to handle minor revisions. - Removed the comment regarding the best guess for min_acc_length - Link to v2: https://lore.kernel.org/r/[email protected] Changes in v2: - Renamed MDSS UBWC programming function to make it more obvious that they are related to the MDSS revision rather than UBWC version (Konrad) - Brought back the patch to use qcom_ubwc_version_tag() in msm_mdss.c, got lost in rebases (Konrad) - Link to v1: https://lore.kernel.org/r/[email protected] --- Dmitry Baryshkov (26): drm/msm/mdss: correct UBWC programming sequences soc: qcom: ubwc: define UBWC 3.1 soc: qcom: ubwc: define helper for MDSS and Adreno drivers soc: qcom: ubwc: add helper controlling AMSBC enablement drm/msm/adreno: use qcom_ubwc_version_tag() helper drm/msm/mdss: use qcom_ubwc_version_tag() helper drm/msm/adreno: use new helper to set min_acc length drm/msm/mdss: use new helper to set min_acc length drm/msm/adreno: use new helper to set macrotile_mode drm/msm/mdss: use new helper to set macrotile_mode drm/msm/mdss: use new helper to set UBWC bank spreading drm/msm/adreno: use new helper to set ubwc_swizzle drm/msm/dpu: use new helper to set ubwc_swizzle drm/msm/mdss: use new helper to set ubwc_swizzle drm/msm/adreno: use new helper to set amsbc drm/msm/mdss: use new helper to set amsbc drm/msm/dpu: drop ubwc_dec_version drm/msm/dpu: invert the order of UBWC checks drm/msm/adreno: adapt for UBWC 3.1 support soc: qcom: ubwc: set min_acc length to 64 for all UBWC 1.0 targets soc: qcom: ubwc: drop ubwc_dec_version soc: qcom: ubwc: drop ubwc_bank_spread soc: qcom: ubwc: drop macrotile_mode from the database soc: qcom: ubwc: use fixed values for UBWC swizzle for UBWC < 4.0 soc: qcom: ubwc: sort out the rest of the UBWC swizzle settings soc: qcom: ubwc: deduplicate UBWC configuration data Konrad Dybcio (1): drm/msm/adreno: Trust the SSoT UBWC config drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 11 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 93 +-------- drivers/gpu/drm/msm/adreno/a8xx_gpu.c | 19 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 4 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 39 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 3 +- drivers/gpu/drm/msm/msm_mdss.c | 120 ++++-------- drivers/soc/qcom/ubwc_config.c | 281 +++++++--------------------- include/linux/soc/qcom/ubwc.h | 103 ++++++---- 10 files changed, 217 insertions(+), 461 deletions(-) --- base-commit: a0ae2a256046c0c5d3778d1a194ff2e171f16e5f change-id: 20260211-ubwc-rework-e6ce1d8eb520 prerequisite-change-id: 20260110-iris-ubwc-06f64cbb31ae:v4 prerequisite-patch-id: 258496117b2e498200190910a37776be2ced6382 prerequisite-patch-id: 50f58e5d9c6cd2b520d17a7e7b2e657faa7d0847 prerequisite-patch-id: af2ff44a7b919da2ee06cc40893fbcd3f65d32f7 prerequisite-patch-id: f3a2b9ef97be3fa250ea0a6467b2d5a782315aa5 prerequisite-patch-id: 6bdd2119448e84aacbdc6a54d999d47fc69dac81 prerequisite-patch-id: 38cc9502c93c71324f1a11a1fd438374fc41ca84 prerequisite-patch-id: 059d1f35274246575ca4fa9b4ee33cd4801479d1 prerequisite-patch-id: 1cf4ea774a145cdba617eb8be5c1f7afe5817772 prerequisite-patch-id: 46375dcd0da4629e6031336351b9cf688691d7c5 prerequisite-change-id: 20260228-fix-glymur-ubwc-f673d5ca0581:v2 prerequisite-patch-id: 7982b5ad797f83303a7fc6c932c0c6973114e2a4 prerequisite-patch-id: 5bc7dddd09fcdb4f534f8468ab3ad51781667066 Best regards, -- With best wishes Dmitry
