We don't actually use the tiling setup in the CS checker for
evergreen/cayman yet, but we might as well set it up properly
in case we ever enable it.
Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
---
drivers/gpu/drm/radeon/evergreen.c | 15 ++++++++++++---
drivers/gpu/drm/radeon/evergreen_cs.c | 12 +++++++++---
drivers/gpu/drm/radeon/ni.c | 12 +++++++++++-
drivers/gpu/drm/radeon/radeon.h | 3 +++
4 files changed, 35 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index 9c81b25..76d507c 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2006,14 +2006,23 @@ static void evergreen_gpu_init(struct radeon_device
*rdev)
rdev->config.evergreen.tile_config |= (3 << 0);
break;
}
+ rdev->config.evergreen.tiling_npipes =
rdev->config.evergreen.max_tile_pipes;
/* num banks is 8 on all fusion asics */
if (rdev->flags & RADEON_IS_IGP)
- rdev->config.evergreen.tile_config |= 8 << 4;
+ rdev->config.evergreen.tiling_nbanks = 8;
else
- rdev->config.evergreen.tile_config |=
- ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) <<
4;
+ rdev->config.evergreen.tiling_nbanks =
+ ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
+ rdev->config.evergreen.tile_config |=
+ rdev->config.evergreen.tiling_nbanks << 4;
+ /* group size */
rdev->config.evergreen.tile_config |=
((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8;
+ if (mc_arb_ramcfg & BURSTLENGTH_MASK)
+ rdev->config.evergreen.tiling_group_size = 512;
+ else
+ rdev->config.evergreen.tiling_group_size = 256;
+ /* row size */
rdev->config.evergreen.tile_config |=
((gb_addr_config & 0x30000000) >> 28) << 12;
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c
b/drivers/gpu/drm/radeon/evergreen_cs.c
index 7a833dc..7bdaf41 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -1410,9 +1410,15 @@ int evergreen_cs_parse(struct radeon_cs_parser *p)
if (track == NULL)
return -ENOMEM;
evergreen_cs_track_init(track);
- track->npipes = p->rdev->config.evergreen.tiling_npipes;
- track->nbanks = p->rdev->config.evergreen.tiling_nbanks;
- track->group_size = p->rdev->config.evergreen.tiling_group_size;
+ if (p->rdev->family >= CHIP_CAYMAN) {
+ track->npipes = p->rdev->config.cayman.tiling_npipes;
+ track->nbanks = p->rdev->config.cayman.tiling_nbanks;
+ track->group_size =
p->rdev->config.cayman.tiling_group_size;
+ } else {
+ track->npipes = p->rdev->config.evergreen.tiling_npipes;
+ track->nbanks = p->rdev->config.evergreen.tiling_nbanks;
+ track->group_size =
p->rdev->config.evergreen.tiling_group_size;
+ }
p->track = track;
}
do {
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 16caafe..05ab6f9 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -826,10 +826,20 @@ static void cayman_gpu_init(struct radeon_device *rdev)
rdev->config.cayman.tile_config |= (3 << 0);
break;
}
+ rdev->config.cayman.tiling_npipes = rdev->config.cayman.max_tile_pipes;
+ /* num banks */
+ rdev->config.cayman.tiling_nbanks =
+ ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
rdev->config.cayman.tile_config |=
- ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4;
+ rdev->config.cayman.tiling_nbanks << 4;
+ /* group size */
rdev->config.cayman.tile_config |=
((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >>
PIPE_INTERLEAVE_SIZE_SHIFT) << 8;
+ if (gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK)
+ rdev->config.cayman.tiling_group_size = 512;
+ else
+ rdev->config.cayman.tiling_group_size = 256;
+ /* row size */
rdev->config.cayman.tile_config |=
((gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT) << 12;
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 90dc53b..625f1af 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1141,6 +1141,9 @@ struct cayman_asic {
unsigned num_gpus;
unsigned multi_gpu_tile_size;
+ unsigned tiling_nbanks;
+ unsigned tiling_npipes;
+ unsigned tiling_group_size;
unsigned tile_config;
struct r100_gpu_lockup lockup;
};
--
1.7.1.1
