Signed-off-by: Luca Weiss <[email protected]>
---
 arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts | 71 ++++++++++++++++++++++--
 1 file changed, 66 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts 
b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
index 92b40ab56c26..8cddab412581 100644
--- a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
+++ b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
@@ -612,11 +612,6 @@ eeprom@51 {
        };
 };
 
-&dispcc {
-       /* Disable for now so simple-framebuffer continues working */
-       status = "disabled";
-};
-
 &gcc {
        protected-clocks = <GCC_PCIE_1_AUX_CLK>, <GCC_PCIE_1_AUX_CLK_SRC>,
                           <GCC_PCIE_1_CFG_AHB_CLK>, <GCC_PCIE_1_MSTR_AXI_CLK>,
@@ -725,6 +720,51 @@ &ipa {
        status = "okay";
 };
 
+&mdss {
+       status = "okay";
+};
+
+&mdss_dsi0 {
+       vdda-supply = <&vreg_l4b>;
+
+       status = "okay";
+
+       panel@0 {
+               compatible = "boe,bj631jhm-t71-d900";
+               reg = <0>;
+
+               reset-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
+
+               vci-supply = <&vreg_l19b>;
+               vddio-supply = <&vreg_l9b>;
+               dvdd-supply = <&vreg_oled_dvdd_1p2>;
+               // avdd-supply = <&pmiv0104_oledb> (VREG_OLEDB): 5V-8V
+               // elvss-supply = <&pmiv0104_elvss> (VREG_ELVSS): -8V-0V
+               // elvdd-supply = <&pmiv0104_elvdd> (VREG_ELVDD - OLEDB): 0-8V
+
+               pinctrl-0 = <&disp_reset_n_active>, <&mdp_vsync>;
+               pinctrl-1 = <&disp_reset_n_suspend>, <&mdp_vsync>;
+               pinctrl-names = "default", "sleep";
+
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&mdss_dsi0_out>;
+                       };
+               };
+       };
+};
+
+&mdss_dsi0_out {
+       data-lanes = <0 1 2 3>;
+       remote-endpoint = <&panel_in>;
+};
+
+&mdss_dsi0_phy {
+       vdds-supply = <&vreg_l2b>;
+
+       status = "okay";
+};
+
 &pm8550vs_c {
        status = "okay";
 };
@@ -883,6 +923,20 @@ &tlmm {
                               <13 1>, /* NC */
                               <63 2>; /* WLAN UART */
 
+       disp_reset_n_active: disp-reset-n-active-state {
+               pins = "gpio12";
+               function = "gpio";
+               drive-strength = <8>;
+               bias-disable;
+       };
+
+       disp_reset_n_suspend: disp-reset-n-suspend-state {
+               pins = "gpio12";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-pull-down;
+       };
+
        ts_active: ts-irq-active-state {
                pins = "gpio19";
                function = "gpio";
@@ -910,6 +964,13 @@ pm8008_int_default: pm8008-int-default-state {
                drive-strength = <2>;
                bias-disable;
        };
+
+       mdp_vsync: mdp-vsync-state {
+               pins = "gpio129";
+               function = "mdp_vsync";
+               drive-strength = <2>;
+               bias-pull-down;
+       };
 };
 
 &uart5 {

-- 
2.52.0

Reply via email to