On 10/22/2025 8:57 PM, Konrad Dybcio wrote:
> On 10/17/25 7:08 PM, Akhil P Oommen wrote:
>> From: Jie Zhang <[email protected]>
>>
>> Add gpu and rgmu nodes for qcs615 chipset.
>>
>> Signed-off-by: Jie Zhang <[email protected]>
>> Signed-off-by: Akhil P Oommen <[email protected]>
>> ---
>
> [...]
>
>> + gpu_zap_shader: zap-shader {
>> + memory-region = <&pil_gpu_mem>;
>> + };
>> +
>> + gpu_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-845000000 {
>> + opp-hz = /bits/ 64 <845000000>;
>> + required-opps = <&rpmhpd_opp_turbo>;
>> + opp-peak-kBps = <7050000>;
>
> Are there speed bins?
None I am aware of as of now.
>
> [...]
>
>> + rgmu: rgmu@506a000 {
>> + compatible = "qcom,adreno-rgmu-612.0",
>> "qcom,adreno-rgmu";
>> + reg = <0x0 0x0506a000 0x0 0x34000>;
>> + reg-names = "gmu";
>> +
>> + clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
>> + <&gpucc GPU_CC_CXO_CLK>,
>> + <&gcc GCC_DDRSS_GPU_AXI_CLK>,
>> + <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
>> + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
>> + clock-names = "gmu",
>> + "cxo",
>> + "axi",
>> + "memnoc",
>> + "smmu_vote";
>> +
>> + power-domains = <&gpucc CX_GDSC>,
>> + <&gpucc GX_GDSC>,
>> + <&rpmhpd RPMHPD_CX>;
>> + power-domain-names = "cx", "gx", "vdd_cx";
>
> I think the gpucc node should reference _CX directly instead,
> then genpd/opp should trickle the requirements up the chain
Do you mean the CX rail scaling here should be handled by gpucc clk driver?
>
>> +
>> + interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "oob", "gmu";
>
> 1 a line, please
Ack. Thanks
-Akhil
>
> lgtm otherwise
>
> Konrad
