The drm_gem_for_each_gpuvm_bo() call from lookup_vma() accesses
drm_gem_obj.gpuva.list, which is not initialized when the drm driver
does not support DRIVER_GEM_GPUVA feature. Enable it for msm_kms
drm driver to fix the splat seen when msm.separate_gpu_drm=1 modparam
is set. Also, update the description of DRIVER_GEM_GPUVA flag to
reflect that it is also used by DRM drivers which doesn't support user
defined GPUVA bindings. For eg: msm_kms driver.
Unable to handle kernel paging request at virtual address
fffffffffffffff0
Mem abort info:
ESR = 0x0000000096000006
EC = 0x25: DABT (current EL), IL = 32 bits
SET = 0, FnV = 0
EA = 0, S1PTW = 0
FSC = 0x06: level 2 translation fault
Data abort info:
ISV = 0, ISS = 0x00000006, ISS2 = 0x00000000
CM = 0, WnR = 0, TnD = 0, TagAccess = 0
GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0
swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000ad370f000
[fffffffffffffff0] pgd=0000000000000000, p4d=0000000ad4787403,
pud=0000000ad4788403, pmd=0000000000000000
Internal error: Oops: 0000000096000006 [#1] SMP
CPU: 9 UID: 0 PID: 448 Comm: (udev-worker) Not tainted
6.17.0-rc4-assorted-fix-00005-g0e9bb53a2282-dirty #3 PREEMPT
pstate: a1400005 (NzCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
pc : lookup_vma+0x28/0xe0 [msm]
lr : get_vma_locked+0x2c/0x128 [msm]
sp : ffff800082dab460
Call trace:
lookup_vma+0x28/0xe0 [msm] (P)
get_vma_locked+0x2c/0x128 [msm]
msm_gem_get_and_pin_iova_range+0x68/0x11c [msm]
msm_gem_get_and_pin_iova+0x18/0x24 [msm]
msm_fbdev_driver_fbdev_probe+0xd0/0x258 [msm]
__drm_fb_helper_initial_config_and_unlock+0x288/0x528 [drm_kms_helper]
drm_fb_helper_initial_config+0x44/0x54 [drm_kms_helper]
drm_fbdev_client_hotplug+0x84/0xd4 [drm_client_lib]
drm_client_register+0x58/0x9c [drm]
drm_fbdev_client_setup+0xe8/0xcf0 [drm_client_lib]
drm_client_setup+0xb4/0xd8 [drm_client_lib]
msm_drm_kms_post_init+0x2c/0x3c [msm]
msm_drm_init+0x1a8/0x22c [msm]
msm_drm_bind+0x30/0x3c [msm]
try_to_bring_up_aggregate_device+0x168/0x1d4
__component_add+0xa4/0x170
component_add+0x14/0x20
msm_dp_display_probe_tail+0x4c/0xac [msm]
msm_dp_auxbus_done_probe+0x14/0x20 [msm]
dp_aux_ep_probe+0x4c/0xf0 [drm_dp_aux_bus]
really_probe+0xbc/0x298
__driver_probe_device+0x78/0x12c
driver_probe_device+0x40/0x160
__driver_attach+0x94/0x19c
bus_for_each_dev+0x74/0xd4
driver_attach+0x24/0x30
bus_add_driver+0xe4/0x208
driver_register+0x60/0x128
__dp_aux_dp_driver_register+0x24/0x30 [drm_dp_aux_bus]
atana33xc20_init+0x20/0x1000 [panel_samsung_atna33xc20]
do_one_initcall+0x6c/0x1b0
do_init_module+0x58/0x234
load_module+0x19cc/0x1bd4
init_module_from_file+0x84/0xc4
__arm64_sys_finit_module+0x1b8/0x2cc
invoke_syscall+0x48/0x110
el0_svc_common.constprop.0+0xc8/0xe8
do_el0_svc+0x20/0x2c
el0_svc+0x34/0xf0
el0t_64_sync_handler+0xa0/0xe4
el0t_64_sync+0x198/0x19c
Code: eb0000bf 54000480 d100a003 aa0303e2 (f8418c44)
---[ end trace 0000000000000000 ]---
Fixes: 217ed15bd399 ("drm/msm: enable separate binding of GPU and display
devices")
Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@oss.qualcomm.com>
Signed-off-by: Akhil P Oommen <akhi...@oss.qualcomm.com>
---
drivers/gpu/drm/msm/msm_drv.c | 1 +
include/drm/drm_drv.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index
9dcc7a596a11d9342a515dab694bac93dc2805cb..7e977fec4100792394dccf59097a01c2b2556608
100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -826,6 +826,7 @@ static const struct file_operations fops = {
#define DRIVER_FEATURES_KMS ( \
DRIVER_GEM | \
+ DRIVER_GEM_GPUVA | \
DRIVER_ATOMIC | \
DRIVER_MODESET | \
0 )
diff --git a/include/drm/drm_drv.h b/include/drm/drm_drv.h
index
42fc085f986dee9261f8b08c4fc7d93b8d6d9769..8729c88fd12ba76eb0084fc1a2ebccaabf377995
100644
--- a/include/drm/drm_drv.h
+++ b/include/drm/drm_drv.h
@@ -110,7 +110,8 @@ enum drm_driver_feature {
/**
* @DRIVER_GEM_GPUVA:
*
- * Driver supports user defined GPU VA bindings for GEM objects.
+ * Driver uses the drm_gpuvm infrastructure for managing GPU virtual
+ * address mappings of GEM objects.
*/
DRIVER_GEM_GPUVA = BIT(8),
/**
--
2.50.1
