On 8/25/25 9:07 PM, Alexandre Courbot wrote:
> The GSP bootloader is a small RISC-V firmware that is loaded by Booter
> onto the GSP core and is in charge of loading, validating, and starting
> the actual GSP firmware.
>
> It is a regular binary firmware file containing a specific header.
> Create a type holding the DMA-mapped firmware as well as useful
> information extracted from the header, and hook it into our firmware
> structure for later use.
>
> Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
> ---
> drivers/gpu/nova-core/firmware.rs | 7 ++-
> drivers/gpu/nova-core/firmware/riscv.rs | 89
> +++++++++++++++++++++++++++++++++
> 2 files changed, 94 insertions(+), 2 deletions(-)
>
I've once again failed to find any problems with the code itself, and
have instead listed one or two trivial documentation suggestions,
below. :)
Reviewed-by: John Hubbard <jhubb...@nvidia.com>
> diff --git a/drivers/gpu/nova-core/firmware.rs
> b/drivers/gpu/nova-core/firmware.rs
> index
> be190af1e11aec26c18c85324a185d135a16eabe..9bee0e0a0ab99d10be7e56d366970fdf4c813fc4
> 100644
> --- a/drivers/gpu/nova-core/firmware.rs
> +++ b/drivers/gpu/nova-core/firmware.rs
> @@ -12,6 +12,7 @@
> use kernel::prelude::*;
> use kernel::str::CString;
> use kernel::transmute::FromBytes;
> +use riscv::RiscvFirmware;
>
> use crate::dma::DmaObject;
> use crate::driver::Bar0;
> @@ -22,6 +23,7 @@
>
> pub(crate) mod booter;
> pub(crate) mod fwsec;
> +pub(crate) mod riscv;
>
> pub(crate) const FIRMWARE_VERSION: &str = "535.113.01";
>
> @@ -32,7 +34,8 @@ pub(crate) struct Firmware {
> booter_loader: BooterFirmware,
> /// Runs on the sec2 falcon engine to stop and unload a running GSP
> firmware.
> booter_unloader: BooterFirmware,
> - bootloader: firmware::Firmware,
> + /// GSP bootloader, verifies the GSP firmware before loading and running
> it.
> + gsp_bootloader: RiscvFirmware,
> gsp: firmware::Firmware,
> }
>
> @@ -58,7 +61,7 @@ pub(crate) fn new(
> .and_then(|fw| BooterFirmware::new(dev, &fw, sec2, bar))?,
> booter_unloader: request("booter_unload")
> .and_then(|fw| BooterFirmware::new(dev, &fw, sec2, bar))?,
> - bootloader: request("bootloader")?,
> + gsp_bootloader: request("bootloader").and_then(|fw|
> RiscvFirmware::new(dev, &fw))?,
> gsp: request("gsp")?,
> })
> }
> diff --git a/drivers/gpu/nova-core/firmware/riscv.rs
> b/drivers/gpu/nova-core/firmware/riscv.rs
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..926883230f2fe4e3327713e28b7fae31ebee60bb
> --- /dev/null
> +++ b/drivers/gpu/nova-core/firmware/riscv.rs
> @@ -0,0 +1,89 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +//! Support for firmware binaries designed to run on a RISC-V cores. Such
> firmwares have a
typo: s/cores/core/
Also, as long as we're here: "Such firmwares" is understandable, but
"Such firmware files" is better.
> +//! dedicated header.
> +
> +use kernel::device;
> +use kernel::firmware::Firmware;
> +use kernel::prelude::*;
> +use kernel::transmute::FromBytes;
> +
> +use crate::dma::DmaObject;
> +use crate::firmware::BinFirmware;
> +
> +/// Descriptor for microcode running on a RISC-V core.
> +#[repr(C)]
> +#[derive(Debug)]
> +struct RmRiscvUCodeDesc {
> + version: u32,
> + bootloader_offset: u32,
> + bootloader_size: u32,
> + bootloader_param_offset: u32,
> + bootloader_param_size: u32,
> + riscv_elf_offset: u32,
> + riscv_elf_size: u32,
> + app_version: u32,
> + manifest_offset: u32,
> + manifest_size: u32,
> + monitor_data_offset: u32,
> + monitor_data_size: u32,
> + monitor_code_offset: u32,
> + monitor_code_size: u32,
> +}
> +
> +// SAFETY: all bit patterns are valid for this type, and it doesn't use
> interior mutability.
> +unsafe impl FromBytes for RmRiscvUCodeDesc {}
> +
> +impl RmRiscvUCodeDesc {
> + /// Interprets the header of `bin_fw` as a [`RmRiscvUCodeDesc`] and
> returns it.
> + ///
> + /// Fails if the header pointed at by `bin_fw` is not within the bounds
> of the firmware image.
> + fn new(bin_fw: &BinFirmware<'_>) -> Result<Self> {
> + let offset = bin_fw.hdr.header_offset as usize;
> +
> + bin_fw
> + .fw
> + .get(offset..offset + size_of::<Self>())
> + .and_then(Self::from_bytes_copy)
> + .ok_or(EINVAL)
> + }
> +}
> +
> +/// A parsed firmware for a RISC-V core, ready to be loaded and run.
> +#[expect(unused)]
> +pub(crate) struct RiscvFirmware {
> + /// Offset at which the code starts in the firmware image.
> + code_offset: u32,
> + /// Offset at which the data starts in the firmware image.
> + data_offset: u32,
> + /// Offset at which the manifest starts in the firmware image.
> + manifest_offset: u32,
> + /// Application version.
> + app_version: u32,
> + /// Device-mapped firmware image.
> + ucode: DmaObject,
> +}
> +
> +impl RiscvFirmware {
> + // Parses the RISC-V firmware image contained in `fw`.
Should this be a "///" comment?
> + pub(crate) fn new(dev: &device::Device<device::Bound>, fw: &Firmware) ->
> Result<Self> {
> + let bin_fw = BinFirmware::new(fw)?;
> +
> + let riscv_desc = RmRiscvUCodeDesc::new(&bin_fw)?;
> +
> + let ucode = {
> + let start = bin_fw.hdr.data_offset as usize;
> + let len = bin_fw.hdr.data_size as usize;
> +
> + DmaObject::from_data(dev, fw.data().get(start..start +
> len).ok_or(EINVAL)?)?
> + };
> +
> + Ok(Self {
> + ucode,
> + code_offset: riscv_desc.monitor_code_offset,
> + data_offset: riscv_desc.monitor_data_offset,
> + manifest_offset: riscv_desc.manifest_offset,
> + app_version: riscv_desc.app_version,
> + })
> + }
> +}
>
thanks,
--
John Hubbard
