Increase maximum VI clock frequency to 450MHz to allow correct work with
high resolution camera sensors.

Signed-off-by: Svyatoslav Ryhel <clamo...@gmail.com>
---
 drivers/staging/media/tegra-video/tegra20.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/media/tegra-video/tegra20.c 
b/drivers/staging/media/tegra-video/tegra20.c
index 71dcb982c97b..67631e0c9ffc 100644
--- a/drivers/staging/media/tegra-video/tegra20.c
+++ b/drivers/staging/media/tegra-video/tegra20.c
@@ -589,7 +589,7 @@ const struct tegra_vi_soc tegra20_vi_soc = {
        .ops = &tegra20_vi_ops,
        .hw_revision = 1,
        .vi_max_channels = 1, /* parallel input (VIP) */
-       .vi_max_clk_hz = 150000000,
+       .vi_max_clk_hz = 450000000,
        .has_h_v_flip = true,
 };
 
-- 
2.48.1

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