Le 31/07/2025 à 02:17, Rob Herring a écrit :
On Wed, Jul 30, 2025 at 07:02:46PM +0200, Louis Chauvet wrote:
For am62 processors, we need to use the newly created clk-ctrl property to
properly handle data edge sampling configuration. Add them in the main
device tree.
Fixes: 32a1795f57ee ("drm/tidss: New driver for TI Keystone platform Display
SubSystem")
Signed-off-by: Louis Chauvet <louis.chau...@bootlin.com>
---
Cc: sta...@vger.kernel.org
---
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index
9e0b6eee9ac77d66869915b2d7bec3e2275c03ea..d3131e6da8e70fde035d3c44716f939e8167795a
100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -76,6 +76,11 @@ audio_refclk1: clock-controller@82e4 {
assigned-clock-parents = <&k3_clks 157 18>;
#clock-cells = <0>;
};
+
+ dss_clk_ctrl: dss_clk_ctrl@8300 {
+ compatible = "ti,am625-dss-clk-ctrl", "syscon";
+ reg = <0x8300 0x4>;
H/w blocks are rarely only 4 bytes of registers... Does this belong to
some larger block. The problem with bindings defining single registers
like this is they don't get defined until needed and you have a constant
stream of DT updates.
In this case, I don't think there is a "larger block". This register
exists only because TI had issues in the display controller [1].
Here is the extract of MMR registers ([2], page 4311):
[...]
A2E4h AUDIO_REFCLK1_CTRL_PROXY <unrelated>
A300h DPI0_CLK_CTRL_PROXY <this register, 32 bits>
<nothing between 0xA304 and 0xA319>
A320h DSS_DISPC0_CLKSEL1_PROXY <an other dss clock stuff, 32 bits>
A330h MCASP0_CLKSEL_PROXY <unrelated>
[...]
I agree that DSS_DISPC_CLKSEL_PROXY is also related to DSS clock stuff,
so may be included in the same block, but there is also a big hole in
between. What do you think is better?
[1]:https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1228207/am62a7-rgb-display-flickering-and-pixel-issue/4687209#4687209
[2]:https://www.ti.com/lit/ug/spruiv7b/spruiv7b.pdf#page=4311
+ };
};
dmss: bus@48000000 {
@@ -787,6 +792,7 @@ dss: dss@30200000 {
<&k3_clks 186 2>;
clock-names = "fck", "vp1", "vp2";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ ti,clk-ctrl = <&dss_clk_ctrl>;
status = "disabled";
dss_ports: ports {
--
2.50.1
--
Louis Chauvet, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
