On Tue, Jul 29, 2025 at 05:00:28PM +0800, Chaoyi Chen wrote: > From: Chaoyi Chen <chaoyi.c...@rock-chips.com> > > The RK3399 SoC integrates two USB/DP combo PHYs, each of which > supports software-configurable pin mapping and DisplayPort lane > assignment. These capabilities enable the PHY itself to handle both > mode switching and orientation switching, based on the Type-C plug > orientation and USB PD negotiation results. > > While an external Type-C controller is still required to detect cable > attachment and report USB PD events, the actual mode and orientation > switching is performed internally by the PHY through software > configuration. This allows the PHY to act as a Type-C multiplexer for > both data role and DP altmode configuration. > > To reflect this hardware design, this patch introduces a new > "mode-switch" property for the dp-port node in the device tree bindings. > This property indicates that the connected PHY is capable of handling > Type-C mode switching itself. > > Signed-off-by: Chaoyi Chen <chaoyi.c...@rock-chips.com> > --- > > Changes in v3: > - Add more descriptions to clarify the role of the PHY in switching. > > Changes in v2: > - Reuse dp-port/usb3-port in rk3399-typec-phy binding. > > .../devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git > a/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml > b/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml > index 91c011f68cd0..ccbe1c9cb0bf 100644 > --- a/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml > @@ -51,6 +51,12 @@ properties: > '#phy-cells': > const: 0 > > + mode-switch: > + description: |
Do not need '|' unless you need to preserve formatting. Acked-by: Krzysztof Kozlowski <krzysztof.kozlow...@linaro.org> Best regards, Krzysztof
