From: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com> Add LPCLK clock support in the RZ/G2L MIPI DSI driver via the optional clock API. This clock is required by some SoCs like RZ/V2H(P) for proper DPHY configuration, whereas it is absent on others like RZ/G2L.
Introduce a new `lpclk` field in the `rzg2l_mipi_dsi` structure and conditionally acquire the "lpclk" clock using `devm_clk_get_optional()` during probe. This allows LPCLK-aware SoCs to pass the clock via device tree without impacting existing platforms. Co-developed-by: Fabrizio Castro <fabrizio.castro...@renesas.com> Signed-off-by: Fabrizio Castro <fabrizio.castro...@renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com> Reviewed-by: Biju Das <biju.das...@bp.renesas.com> --- v6->v7: - New patch Note, this patch was previously part of series [0]. [0] https://lore.kernel.org/all/20250609225630.502888-1-prabhakar.mahadev-lad...@bp.renesas.com/ --- drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c index f87337c3cbb5..893a90c7a886 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c @@ -68,6 +68,7 @@ struct rzg2l_mipi_dsi { struct drm_bridge *next_bridge; struct clk *vclk; + struct clk *lpclk; enum mipi_dsi_pixel_format format; unsigned int num_data_lanes; @@ -979,6 +980,10 @@ static int rzg2l_mipi_dsi_probe(struct platform_device *pdev) if (IS_ERR(dsi->vclk)) return PTR_ERR(dsi->vclk); + dsi->lpclk = devm_clk_get_optional(dsi->dev, "lpclk"); + if (IS_ERR(dsi->lpclk)) + return PTR_ERR(dsi->lpclk); + dsi->rstc = devm_reset_control_get_optional_exclusive(dsi->dev, "rst"); if (IS_ERR(dsi->rstc)) return dev_err_probe(dsi->dev, PTR_ERR(dsi->rstc), -- 2.50.1
