Hello Cristian， At 2025-07-22 01:39:04, "Cristian Ciocaltea" <cristian.ciocal...@collabora.com> wrote: >Take the bits per color channel into consideration when computing DCLK >rate. > >Signed-off-by: Cristian Ciocaltea <cristian.ciocal...@collabora.com> >--- > drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 3 +++ > 1 file changed, 3 insertions(+) > >diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c >b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c >index >186f6452a7d359f079662bc580850929632ea8fe..a714bcbb02de16267e7febbaeb1eb270c70aaef2 > 100644 >--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c >+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c >@@ -1731,6 +1731,9 @@ static void vop2_crtc_atomic_enable(struct drm_crtc >*crtc, > clock *= 2; > } > >+ if (vcstate->output_bpc > 8) >+ clock = DIV_ROUND_CLOSEST(clock * vcstate->output_bpc, 8);
This seems not right, regardless of the value of bpc, the dclk of VOP must be consistent with mode->crtc_clock. If the dclk of VOP is increased in accordance with the BPC ratio here, then the refresh rate of VOP will also increase proportionally. This would be inconsistent with the timing described in the mode. For a hight color depth, the frequency needs to be increased for the HDMI PHY's clock. >+ > vop2_vp_write(vp, RK3568_VP_MIPI_CTRL, 0); > > /* > >-- >2.50.0
