The Allwinner H616 (and its H618, H700 and T507 package variants with the same die) have 28 video output pins for RGB/SPI and LVDS display. These are in GPIO Bank D and are multiplexed.
In RGB mode, pins PD0-PD23 are for 24-bit RGB pixel output, pins PD24-PD27 are for clock, DE, HSYNC and VSYNC. In LVDS mode, pins PD0-PD9 are for LVDS0 and pins PD10-19 for LVDS1, and can be configured by the H616 display engine for either one high- resolution (dual link) or two low resolution displays. Add device tree nodes for the LCD and LVDS pins. Signed-off-by: Jernej Skrabec <[email protected]> [[email protected]: add RGB and LVDS1 pin assignments] Signed-off-by: Ryan Walklin <[email protected]> -- Changelog v1..v2: - Remove PWM pin assignment as driver not implemented --- .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index e4209dc6b46b..1d4ad2adca7d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -339,6 +339,32 @@ ir_rx_pin: ir-rx-pin { function = "ir_rx"; }; + /omit-if-no-ref/ + lcd0_rgb888_pins: lcd0-rgb888-pins { + pins = "PD0", "PD1", "PD2", "PD3", + "PD4", "PD5", "PD6", "PD7", + "PD8", "PD9", "PD10", "PD11", + "PD12", "PD13", "PD14", "PD15", + "PD16", "PD17", "PD18", "PD19", + "PD20", "PD21", "PD22", "PD23", + "PD24", "PD25", "PD26", "PD27"; + function = "lcd0"; + }; + + /omit-if-no-ref/ + lvds0_pins: lvds0-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", + "PD5", "PD6", "PD7", "PD8", "PD9"; + function = "lvds0"; + }; + + /omit-if-no-ref/ + lvds1_pins: lvds1-pins { + pins = "PD10", "PD11", "PD12", "PD13", "PD14", + "PD15", "PD16", "PD17", "PD18", "PD19"; + function = "lvds1"; + }; + mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; -- 2.50.1
