On Wed, Jun 18, 2025 at 12:22:13PM +0200, Michal Wilczynski wrote:
> Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD
> TH1520 SoC used by the Lichee Pi 4A board. This node enables support for
> the GPU using the drm/imagination driver.
> 
> By adding this node, the kernel can recognize and initialize the GPU,
> providing graphics acceleration capabilities on the Lichee Pi 4A and
> other boards based on the TH1520 SoC.
> 
> Add fixed clock gpu_mem_clk, as the MEM clock on the T-HEAD SoC can't be
> controlled programatically.
> 
> Reviewed-by: Ulf Hansson <ulf.hans...@linaro.org>
> Signed-off-by: Michal Wilczynski <m.wilczyn...@samsung.com>
> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi 
> b/arch/riscv/boot/dts/thead/th1520.dtsi
> index 
> f3f5db0201ab8c0306d4d63072a1573431e51893..c8447eef36c3a6e92d768658b6b19dfeb59a47c4
>  100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -225,6 +225,13 @@ aonsys_clk: clock-73728000 {
>               #clock-cells = <0>;
>       };
>  
> +     gpu_mem_clk: mem-clk {
> +             compatible = "fixed-clock";
> +             clock-frequency = <0>;
> +             clock-output-names = "gpu_mem_clk";
> +             #clock-cells = <0>;
> +     };
> +
>       stmmac_axi_config: stmmac-axi-config {
>               snps,wr_osr_lmt = <15>;
>               snps,rd_osr_lmt = <15>;
> @@ -500,6 +507,21 @@ clk: clock-controller@ffef010000 {
>                       #clock-cells = <1>;
>               };
>  
> +             gpu: gpu@ffef400000 {
> +                     compatible = "thead,th1520-gpu", "img,img-bxm-4-64",
> +                                  "img,img-rogue";
> +                     reg = <0xff 0xef400000 0x0 0x100000>;
> +                     interrupt-parent = <&plic>;
> +                     interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
> +                     clocks = <&clk_vo CLK_GPU_CORE>,
> +                              <&gpu_mem_clk>,
> +                              <&clk_vo CLK_GPU_CFG_ACLK>;
> +                     clock-names = "core", "mem", "sys";
> +                     power-domains = <&aon TH1520_GPU_PD>;
> +                     power-domain-names = "a";
> +                     resets = <&rst TH1520_RESET_ID_GPU>;
> +             };
> +
>               rst: reset-controller@ffef528000 {
>                       compatible = "thead,th1520-reset";
>                       reg = <0xff 0xef528000 0x0 0x4f>;
> 
> -- 
> 2.34.1
> 

Reviewed-by: Drew Fustini <d...@pdp7.com>

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