[PATCH] drm/mediatek: mtk_dpi: Reorder output formats on MT8195/88

[Louis-Alexis Eyraud]

Reorder output format arrays in both MT8195 DPI and DP_INTF block
configuration by decreasing preference order instead of alphanumeric
one, as expected by the atomic_get_output_bus_fmts callback function
of drm_bridge controls, so the RGB ones are used first during the
bus format negotiation process.

Fixes: 20fa6a8fc588 ("drm/mediatek: mtk_dpi: Allow additional output formats on 
MT8195/88")
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyr...@collabora.com>
---
 drivers/gpu/drm/mediatek/mtk_dpi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c 
b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 
6fb85bc6487a019cdcdb3770dc06a1deab8d5bda..a2fdceadf209f6d2166e7523b82ca18c82c7d435
 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -1095,7 +1095,6 @@ static const u32 mt8183_output_fmts[] = {
 };
 
 static const u32 mt8195_dpi_output_fmts[] = {
-       MEDIA_BUS_FMT_BGR888_1X24,
        MEDIA_BUS_FMT_RGB888_1X24,
        MEDIA_BUS_FMT_RGB888_2X12_LE,
        MEDIA_BUS_FMT_RGB888_2X12_BE,
@@ -1103,18 +1102,19 @@ static const u32 mt8195_dpi_output_fmts[] = {
        MEDIA_BUS_FMT_YUYV8_1X16,
        MEDIA_BUS_FMT_YUYV10_1X20,
        MEDIA_BUS_FMT_YUYV12_1X24,
+       MEDIA_BUS_FMT_BGR888_1X24,
        MEDIA_BUS_FMT_YUV8_1X24,
        MEDIA_BUS_FMT_YUV10_1X30,
 };
 
 static const u32 mt8195_dp_intf_output_fmts[] = {
-       MEDIA_BUS_FMT_BGR888_1X24,
        MEDIA_BUS_FMT_RGB888_1X24,
        MEDIA_BUS_FMT_RGB888_2X12_LE,
        MEDIA_BUS_FMT_RGB888_2X12_BE,
        MEDIA_BUS_FMT_RGB101010_1X30,
        MEDIA_BUS_FMT_YUYV8_1X16,
        MEDIA_BUS_FMT_YUYV10_1X20,
+       MEDIA_BUS_FMT_BGR888_1X24,
        MEDIA_BUS_FMT_YUV8_1X24,
        MEDIA_BUS_FMT_YUV10_1X30,
 };

---
base-commit: b3bded85d838336326ce78e394e7818445e11f20
change-id: 20250606-mtk_dpi-mt8195-fix-wrong-color-5aab0f6d2d27

Best regards,
-- 
Louis-Alexis Eyraud <louisalexis.eyr...@collabora.com>