(RH email ate this the first time). This is a bit of a tangent before continuing the tangent that is memcg aware pools.
The pools code is already NUMA aware, but it rolls it's own numa awareness, and in order to move towards memcg awareness, I think a first step is porting the pool code to lru_list and making the current shrinker NUMA aware. Once this is done then the next step should be to make the pools/shrinker memcg aware. I've done light testing of this on a single node rx7900xt and a 4 node MI300A, and it seems to operate the way I'd expect, but just wanted to get some feedback on the idea and if anyone can spot any big problems with the strategy. Thanks, Dave.
