On 5/21/2025 3:02 PM, Jouni Högander wrote:
Add PANEL REPLAY CAPABILITY register (0xb1) bits.
v2: comment about DP2.1 changed as DP2.1a
Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
---
include/drm/display/drm_dp.h | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 3371e2edd9e9..c0579f827999 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -554,8 +554,14 @@
#define DP_PANEL_REPLAY_CAP_SIZE 7
-#define DP_PANEL_REPLAY_CAP_CAPABILITY 0xb1
-# define DP_PANEL_REPLAY_SU_GRANULARITY_REQUIRED (1 << 5)
+#define DP_PANEL_REPLAY_CAP_CAPABILITY 0xb1
+# define DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_SHIFT
1 /* DP 2.1a */
+# define DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_MASK (3
<< 1)
Thanks for clarification about DP2.1 a.
IMHO if we are using the shift
DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_SHIFT1
then perhaps DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_MASK should be:
(3<<DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_SHIFT)
Also the DSC decode capability can be the unshifted:
#defineDP_DSC_DECODE_CAPABILITY_IN_PR_SUPPORTED0x00
#defineDP_DSC_DECODE_CAPABILITY_IN_PR_FULL_FRAME_ONLY0x01
#defineDP_DSC_DECODE_CAPABILITY_IN_PR_NOT_SUPPORTED0x02
#defineDP_DSC_DECODE_CAPABILITY_IN_PR_RESERVED0x03
We can use shifted macros too but imho, these would be easier to re-use.
Regards,
Ankit
+# define DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR
(1 << 3)
+# define DP_PANEL_REPLAY_DSC_CRC_OF_MULTIPLE_SUS_SUPPORTED (1
<< 4)
+# define DP_PANEL_REPLAY_SU_GRANULARITY_REQUIRED (1
<< 5)
+# define DP_PANEL_REPLAY_SU_Y_GRANULARITY_EXTENDED_CAPABILITY_SUPPORTED
(1 << 6)
+# define DP_PANEL_REPLAY_LINK_OFF_SUPPORTED_IN_PR_AFTER_ADAPTIVE_SYNC_SDP (1
<< 7)
#define DP_PANEL_REPLAY_CAP_X_GRANULARITY 0xb2
#define DP_PANEL_REPLAY_CAP_Y_GRANULARITY 0xb4
