On Fri, 25 Apr 2025 12:51:50 +0300, Dmitry Baryshkov wrote:
> The LCDC controller uses pixel clock provided by the multimedia clock
> controller (mmcc) instead of using LVDS PHY clock directly. Link LVDS
> clocks properly, taking MMCC into account.
>
> MDP4 uses custom code to handle LVDS panel. It predates handling
> EPROBE_DEFER, it tries to work when the panel device is not available,
> etc. Switch MDP4 LCDC code to use drm_panel_bridge/drm_bridge_connector
> to follow contemporary DRM practices.
>
> [...]
Applied, thanks!
[7/7] arm: dts: qcom: apq8064: link LVDS clocks
commit: d8dc4889afc92bd8757fcab607b734c684fce167
Best regards,
--
Bjorn Andersson <anders...@kernel.org>
