On Wed, 14 May 2025, Jani Nikula <jani.nik...@linux.intel.com> wrote: > On Wed, 14 May 2025, Ankit Nautiyal <ankit.k.nauti...@intel.com> wrote: >> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6. >> >> Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that >> requires HBR3. After the original commit, these panels go blank due to >> the rejection of HBR3. >> >> To restore functionality for such panels, this commit reverts the change. > > Which panels? References? Bugs?
Regardless, on another reading of the specs, I think the commit being reverted was misguided. TPS4 seems to be required for HBR3 on DPRX, but not eDPRX. BR, Jani. > >> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969 > > This is a reference to a bug that got closed by the commit being > reverted. This now breaks it again, can't use the Closes: tag here. > > Since the original commit was backported to stable, I think we're > probably going to be screwed if we do the revert + fix in two > steps. Maybe we want a fix in one go, and backport that to stable. Idk. > > BR, > Jani. > > >> Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com> >> --- >> drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++--------------------- >> 1 file changed, 7 insertions(+), 42 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c >> b/drivers/gpu/drm/i915/display/intel_dp.c >> index 91a34d474463..97cf80372264 100644 >> --- a/drivers/gpu/drm/i915/display/intel_dp.c >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c >> @@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate) >> >> static int max_dprx_rate(struct intel_dp *intel_dp) >> { >> - struct intel_display *display = to_intel_display(intel_dp); >> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; >> - int max_rate; >> - >> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) >> - max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel); >> - else >> - max_rate = >> drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); >> + return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel); >> >> - /* >> - * Some broken eDP sinks illegally declare support for >> - * HBR3 without TPS4, and are unable to produce a stable >> - * output. Reject HBR3 when TPS4 is not available. >> - */ >> - if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) { >> - drm_dbg_kms(display->drm, >> - "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 >> support\n", >> - encoder->base.base.id, encoder->base.name); >> - max_rate = 540000; >> - } >> - >> - return max_rate; >> + return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); >> } >> >> static int max_dprx_lane_count(struct intel_dp *intel_dp) >> @@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp >> *intel_dp) >> static void >> intel_edp_set_sink_rates(struct intel_dp *intel_dp) >> { >> - struct intel_display *display = to_intel_display(intel_dp); >> - struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; >> - >> intel_dp->num_sink_rates = 0; >> >> if (intel_dp->edp_dpcd[0] >= DP_EDP_14) { >> @@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp) >> sink_rates, sizeof(sink_rates)); >> >> for (i = 0; i < ARRAY_SIZE(sink_rates); i++) { >> - int rate; >> + int val = le16_to_cpu(sink_rates[i]); >> + >> + if (val == 0) >> + break; >> >> /* Value read multiplied by 200kHz gives the per-lane >> * link rate in kHz. The source rates are, however, >> @@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp) >> * back to symbols is >> * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte) >> */ >> - rate = le16_to_cpu(sink_rates[i]) * 200 / 10; >> - >> - if (rate == 0) >> - break; >> - >> - /* >> - * Some broken eDP sinks illegally declare support for >> - * HBR3 without TPS4, and are unable to produce a stable >> - * output. Reject HBR3 when TPS4 is not available. >> - */ >> - if (rate >= 810000 && >> !drm_dp_tps4_supported(intel_dp->dpcd)) { >> - drm_dbg_kms(display->drm, >> - "[ENCODER:%d:%s] Rejecting HBR3 due >> to missing TPS4 support\n", >> - encoder->base.base.id, >> encoder->base.name); >> - break; >> - } >> - >> - intel_dp->sink_rates[i] = rate; >> + intel_dp->sink_rates[i] = (val * 200) / 10; >> } >> intel_dp->num_sink_rates = i; >> } -- Jani Nikula, Intel
