On 5/13/2025 2:18 AM, Konrad Dybcio wrote:
> On 5/9/25 9:21 AM, Akhil P Oommen wrote:
>> From: Jie Zhang <quic_ji...@quicinc.com>
>>
>> Add gpu and gmu nodes for qcs8300 chipset.
>>
>> Signed-off-by: Jie Zhang <quic_ji...@quicinc.com>
>> Signed-off-by: Akhil P Oommen <quic_akhi...@quicinc.com>
>> ---
>
>
>> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 91
>> +++++++++++++++++++++++++++++++++++
>> 1 file changed, 91 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> index
>> 40771b062e8d7010dd93d7cc7b3db73cfa16bfdb..1dbccb9a0c75366aa6986b6adb4feb6164ee8845
>> 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> @@ -2660,6 +2660,97 @@ serdes0: phy@8909000 {
>> status = "disabled";
>> };
>>
>> + gpu: gpu@3d00000 {
>> + compatible = "qcom,adreno-623.0", "qcom,adreno";
>> + reg = <0x0 0x03d00000 0x0 0x40000>,
>
> I haven't noticed it up until now.. this should be moved up in the file
> to sort the nodes by unit address (the serdes node above is 0x089.., gpu
> is 0x03d..)
Looks like GPUCC block got misplaced too. Will fix.
>
> Otherwise, please check if there are freq fuses on this platform, if not,
> feel free to add:
>
> Reviewed-by: Konrad Dybcio <konrad.dyb...@oss.qualcomm.com>
Thanks. We have the SKU related data available. We will add those too in
the next revision.
-Akhil
>
> Konrad
>
