From: "Dr. David Alan Gilbert" <li...@treblig.org>

The last use of smu_v11_0_get_dpm_level_range() was removed in 2020 by
commit 46a301e14e8a ("drm/amd/powerplay: drop unnecessary Navi1x specific
APIs")

Remove it.

Signed-off-by: Dr. David Alan Gilbert <li...@treblig.org>
---
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h  |  5 ---
 .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c    | 39 -------------------
 2 files changed, 44 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
index ed8304d82831..56ae555bb52a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
@@ -281,11 +281,6 @@ int smu_v11_0_set_single_dpm_table(struct smu_context *smu,
                                   enum smu_clk_type clk_type,
                                   struct smu_11_0_dpm_table *single_dpm_table);
 
-int smu_v11_0_get_dpm_level_range(struct smu_context *smu,
-                                 enum smu_clk_type clk_type,
-                                 uint32_t *min_value,
-                                 uint32_t *max_value);
-
 int smu_v11_0_get_current_pcie_link_width_level(struct smu_context *smu);
 
 uint16_t smu_v11_0_get_current_pcie_link_width(struct smu_context *smu);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 25fabf336a64..78e4186d06cc 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -2059,45 +2059,6 @@ int smu_v11_0_set_single_dpm_table(struct smu_context 
*smu,
        return 0;
 }
 
-int smu_v11_0_get_dpm_level_range(struct smu_context *smu,
-                                 enum smu_clk_type clk_type,
-                                 uint32_t *min_value,
-                                 uint32_t *max_value)
-{
-       uint32_t level_count = 0;
-       int ret = 0;
-
-       if (!min_value && !max_value)
-               return -EINVAL;
-
-       if (min_value) {
-               /* by default, level 0 clock value as min value */
-               ret = smu_v11_0_get_dpm_freq_by_index(smu,
-                                                     clk_type,
-                                                     0,
-                                                     min_value);
-               if (ret)
-                       return ret;
-       }
-
-       if (max_value) {
-               ret = smu_v11_0_get_dpm_level_count(smu,
-                                                   clk_type,
-                                                   &level_count);
-               if (ret)
-                       return ret;
-
-               ret = smu_v11_0_get_dpm_freq_by_index(smu,
-                                                     clk_type,
-                                                     level_count - 1,
-                                                     max_value);
-               if (ret)
-                       return ret;
-       }
-
-       return ret;
-}
-
 int smu_v11_0_get_current_pcie_link_width_level(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
-- 
2.49.0

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