On 4/30/25 6:20 PM, neil.armstr...@linaro.org wrote: > On 30/04/2025 13:34, Konrad Dybcio wrote: >> From: Konrad Dybcio <konrad.dyb...@linaro.org> >> >> On recent (SM8550+) Snapdragon platforms, the GPU speed bin data is >> abstracted through SMEM, instead of being directly available in a fuse. >> >> Add support for SMEM-based speed binning, which includes getting >> "feature code" and "product code" from said source and parsing them >> to form something that lets us match OPPs against. >> >> Due to the product code being ignored in the context of Adreno on >> production parts (as of SM8650), hardcode it to SOCINFO_PC_UNKNOWN. >> >> Signed-off-by: Konrad Dybcio <konrad.dyb...@linaro.org> >> ---
[...] >> +/* As of SM8650, PCODE on production SoCs is meaningless wrt the GPU bin */ > > This should be SM8550 No, this is 8650 to signify that this holds true even later Looking into it, I can even say 8750 here now Konrad
