From: Dmitry Baryshkov <lu...@kernel.org>

Continue migration to the MDSS-revision based checks and replace
DPU_DSC_OUTPUT_CTRL feature bit with the core_major_ver >= 5 check.

Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h  | 4 ----
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 6 ------
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h  | 2 --
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h  | 4 ----
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h  | 1 -
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h  | 1 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h          | 5 +----
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c              | 6 ++++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h              | 3 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c                  | 2 +-
 10 files changed, 8 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
index 
634b7dc452839f994c948601fe9a09581cb42a42..c5d964e915cdde1f8a83c2793b0020d7cecde672
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
@@ -262,19 +262,15 @@ static const struct dpu_dsc_cfg sm8150_dsc[] = {
        {
                .name = "dsc_0", .id = DSC_0,
                .base = 0x80000, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_1", .id = DSC_1,
                .base = 0x80400, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_2", .id = DSC_2,
                .base = 0x80800, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_3", .id = DSC_3,
                .base = 0x80c00, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        },
 };
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index 
59e280edcd508c14ee297857a19e9974970566de..dc21c5c232a7ce7d8c21d3a3f30a5c1bc352ddd7
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -261,27 +261,21 @@ static const struct dpu_dsc_cfg sc8180x_dsc[] = {
        {
                .name = "dsc_0", .id = DSC_0,
                .base = 0x80000, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_1", .id = DSC_1,
                .base = 0x80400, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_2", .id = DSC_2,
                .base = 0x80800, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_3", .id = DSC_3,
                .base = 0x80c00, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_4", .id = DSC_4,
                .base = 0x81000, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_5", .id = DSC_5,
                .base = 0x81400, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        },
 };
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
index 
af0d789c47917e9b712282a542c3d0886313c049..c1e620ae9596f400655b64b47e6b51a8d25e1428
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
@@ -195,11 +195,9 @@ static const struct dpu_dsc_cfg sm7150_dsc[] = {
        {
                .name = "dsc_0", .id = DSC_0,
                .base = 0x80000, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_1", .id = DSC_1,
                .base = 0x80400, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        },
 };
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index 
4da7445aa8019894b35b12ace18c0bd6209b9148..81af11630202943b910cd5896f07a32e53a23c6a
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -261,19 +261,15 @@ static const struct dpu_dsc_cfg sm8250_dsc[] = {
        {
                .name = "dsc_0", .id = DSC_0,
                .base = 0x80000, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_1", .id = DSC_1,
                .base = 0x80400, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_2", .id = DSC_2,
                .base = 0x80800, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        }, {
                .name = "dsc_3", .id = DSC_3,
                .base = 0x80c00, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        },
 };
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
index 
6563296190bb27b6cab1b03921af6cff34037cd2..8cdd601a5350e80a5324db42c23bdeb474a59b0c
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
@@ -135,7 +135,6 @@ static const struct dpu_dsc_cfg sm6350_dsc[] = {
        {
                .name = "dsc_0", .id = DSC_0,
                .base = 0x80000, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        },
 };
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
index 
b5a3574e2ce43f7f5d47c42fe1bdd0f084396a9f..c08d8bae3293d00ef7ff28942699ae2a52e2cea9
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
@@ -87,7 +87,6 @@ static const struct dpu_dsc_cfg sm6375_dsc[] = {
        {
                .name = "dsc_0", .id = DSC_0,
                .base = 0x80000, .len = 0x140,
-               .features = BIT(DPU_DSC_OUTPUT_CTRL),
        },
 };
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 
ee8dd66a68f421161961495dd68d39dd4622ecf6..981d259c33631d31f0216f5cfae948b828d03592
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -176,14 +176,11 @@ enum {
 
 /**
  * DSC sub-blocks/features
- * @DPU_DSC_OUTPUT_CTRL       Configure which PINGPONG block gets
- *                            the pixel output from this DSC.
  * @DPU_DSC_NATIVE_42x_EN     Supports NATIVE_422_EN and NATIVE_420_EN encoding
  * @DPU_DSC_MAX
  */
 enum {
-       DPU_DSC_OUTPUT_CTRL = 0x1,
-       DPU_DSC_NATIVE_42x_EN,
+       DPU_DSC_NATIVE_42x_EN = 0x1,
        DPU_DSC_MAX
 };
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index 
c7db917afd27e3daf1e8aad2ad671246bf6c8fbf..3a149caa7ff4f20dc7a902033cf29a168268839e
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
@@ -186,11 +186,13 @@ static void dpu_hw_dsc_bind_pingpong_blk(
  * @dev:  Corresponding device for devres management
  * @cfg:  DSC catalog entry for which driver object is required
  * @addr: Mapped register io address of MDP
+ * @mdss_ver: dpu core's major and minor versions
  * Return: Error code or allocated dpu_hw_dsc context
  */
 struct dpu_hw_dsc *dpu_hw_dsc_init(struct drm_device *dev,
                                   const struct dpu_dsc_cfg *cfg,
-                                  void __iomem *addr)
+                                  void __iomem *addr,
+                                  const struct dpu_mdss_version *mdss_ver)
 {
        struct dpu_hw_dsc *c;
 
@@ -207,7 +209,7 @@ struct dpu_hw_dsc *dpu_hw_dsc_init(struct drm_device *dev,
        c->ops.dsc_disable = dpu_hw_dsc_disable;
        c->ops.dsc_config = dpu_hw_dsc_config;
        c->ops.dsc_config_thresh = dpu_hw_dsc_config_thresh;
-       if (c->caps->features & BIT(DPU_DSC_OUTPUT_CTRL))
+       if (mdss_ver->core_major_ver >= 5)
                c->ops.dsc_bind_pingpong_blk = dpu_hw_dsc_bind_pingpong_blk;
 
        return c;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
index 
fc171bdeca488f6287cf2ba7362ed330ad55b28f..b7013c9822d23238eb5411a5e284bb072ecc3395
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
@@ -64,7 +64,8 @@ struct dpu_hw_dsc {
 
 struct dpu_hw_dsc *dpu_hw_dsc_init(struct drm_device *dev,
                                   const struct dpu_dsc_cfg *cfg,
-                                  void __iomem *addr);
+                                  void __iomem *addr,
+                                  const struct dpu_mdss_version *mdss_ver);
 
 struct dpu_hw_dsc *dpu_hw_dsc_init_1_2(struct drm_device *dev,
                                       const struct dpu_dsc_cfg *cfg,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index 
f917ffb85d2f1b1a0ee826f125d02980b7a79052..f118c6caa1b9007eb03fa9b39efa87dfb46583ba
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -169,7 +169,7 @@ int dpu_rm_init(struct drm_device *dev,
                if (cat->mdss_ver->core_major_ver >= 7)
                        hw = dpu_hw_dsc_init_1_2(dev, dsc, mmio);
                else
-                       hw = dpu_hw_dsc_init(dev, dsc, mmio);
+                       hw = dpu_hw_dsc_init(dev, dsc, mmio, cat->mdss_ver);
 
                if (IS_ERR(hw)) {
                        rc = PTR_ERR(hw);

-- 
2.39.5

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