On 14/04/2025 16:54, Ayushi Makhija wrote:
On 4/14/2025 3:37 PM, Dmitry Baryshkov wrote:
On 14/04/2025 12:56, Ayushi Makhija wrote:
Hi Dmitry,
On 4/11/2025 1:31 AM, Dmitry Baryshkov wrote:
On Thu, Apr 10, 2025 at 06:37:54PM +0530, Ayushi Makhija wrote:
Hi Dmirity/Konard
On 4/7/2025 1:42 AM, Dmitry Baryshkov wrote:
On Fri, Apr 04, 2025 at 05:25:36PM +0530, Ayushi Makhija wrote:
Add anx7625 DSI to DP bridge device nodes.
Signed-off-by: Ayushi Makhija <quic_amakh...@quicinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 208 ++++++++++++++++++++-
1 file changed, 207 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
index 175f8b1e3b2d..8e784ccf4138 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
@@ -28,6 +28,13 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ vph_pwr: vph-pwr-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
vreg_conn_1p8: vreg_conn_1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_conn_1p8";
@@ -128,6 +135,30 @@ dp1_connector_in: endpoint {
};
};
};
+
+ dp-dsi0-connector {
+ compatible = "dp-connector";
+ label = "DSI0";
+ type = "full-size";
+
+ port {
+ dp_dsi0_connector_in: endpoint {
+ remote-endpoint = <&dsi2dp_bridge0_out>;
+ };
+ };
+ };
+
+ dp-dsi1-connector {
+ compatible = "dp-connector";
+ label = "DSI1";
+ type = "full-size";
+
+ port {
+ dp_dsi1_connector_in: endpoint {
+ remote-endpoint = <&dsi2dp_bridge1_out>;
+ };
+ };
+ };
};
&apps_rsc {
@@ -517,9 +548,135 @@ &i2c11 {
&i2c18 {
clock-frequency = <400000>;
- pinctrl-0 = <&qup_i2c18_default>;
+ pinctrl-0 = <&qup_i2c18_default>,
+ <&io_expander_intr_active>,
+ <&io_expander_reset_active>;
These pinctrl entries should go to the IO expander itself.
pinctrl-names = "default";
+
status = "okay";
+
+ io_expander: gpio@74 {
+ compatible = "ti,tca9539";
+ reg = <0x74>;
+ interrupts-extended = <&tlmm 98 IRQ_TYPE_EDGE_BOTH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ gpio2-hog {
This needs a huuge explanation in the commit message. Otherwise I'd say
these pins should likely be used by the corresponding anx bridges.
Thanks, for the review.
Previously, I was referring to the downstream DT and misunderstood the use of
gpio-hog.
After reading the schematic, I realized that gpio2, gpio3, gpio10, and gpio11
are all input pins
to the IO expander TC9539. We have already configured gpio2 and gpio10 as
interrupts in the
ANX7625 bridges, so the gpio-hog is not required. It is working without the
gpio-hog configuration.
Please make sure that there are pinctrl entries for all pins.
Thanks, for the review.
While declaring the pinctrl entries inside the io_expander node, I am getting
below error while checking the DTBS check against DT-binding.
Error :
/local/mnt/workspace/amakhija/linux_next_11042025/linux/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb:
gpio@74: 'dsi0-int-pin-state', 'dsi1-int-pin-state' do not match any of the
regexes:
'^(hog-[0-9]+|.+-hog(-[0-9]+)?)$', 'pinctrl-[0-9]+' from schema $id:
http://devicetree.org/schemas/gpio/gpio-pca95xx.yaml#
TCA9539 is a GPIO controller rather than a pinctrl device, so it doesn't use
pinctrl functions. You don't need to describe properties of the pins that it
provides. However, it can use some pins on its own (like reset-gpios). In such
a case corresponding pin should have a pinctrl configuration under its pinctrl
device.
Hi Dmitry,
Thanks, for the review.
______________ _____________________
___________________
| | | | |
|
| GPIO 98|---ioexp_intr-->| GPIO 0
|------Reset--------->|RESET_N |
| GPIO 97|<--ioexp_reset--| GPIO 1
|----power-enable---->|POWER_EN |
| | | | |
|
| SOC | | tca9539 | |
anx7625 bridge |
| LeMans | | io_expander | |
|
| | | GPIO 2
|<----DSI0_INT_1P8_N--|ALERT_N/INTP |
|______________| |_____________________|
|___________________|
Based on the above connection diagram, I have already configured the
reset(gpio0), power-enable(gpio1) and interrupt (ALERT_N/INTP) (gpio2) for
first instance of anx7625 bridge. Similarly I have configured the reset(gpio8),
power-enable(gpio9) and interrupt (gpio10) for the second instance of the
anx7625 bridge.
bridge@58 {
compatible = "analogix,anx7625";
reg = <0x58>;
interrupts-extended = <&io_expander 2 IRQ_TYPE_EDGE_FALLING>;
enable-gpios = <&io_expander 1 GPIO_ACTIVE_HIGH>;
reset-gpios = <&io_expander 0 GPIO_ACTIVE_HIGH>;
I think above configuration should be fine, we don't need any pinctrl for io
expander's gpios going to anx7625 bridge.
Other two RESET (gpio97) and INTR (gpio98) gpios, which is connecting SOC to io
expander (tca9539), I have already declared them under tlmm node.
io_expander_intr_active: io-expander-intr-active-state {
pins = "gpio98";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
io_expander_reset_active: io-expander-reset-active-state {
pins = "gpio97";
function = "gpio";
drive-strength = <2>;
bias-disable;
output-high;
Yes, this this was I was looking for, thank you.
};
Thanks,
Ayushi
io_expander: gpio@74 {
compatible = "ti,tca9539";
reg = <0x74>;
interrupts-extended = <&tlmm 98 IRQ_TYPE_EDGE_BOTH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
pinctrl-0 = <&io_expander_intr_active>,
<&io_expander_reset_active>;
pinctrl-names = "default";
dsi0_int_pin: dsi0-int-pin-state {
pins = "gpio2";
input-enable;
bias-disable;
};
dsi1_int_pin: dsi1-int-pin-state {
pins = "gpio10";
input-enable;
bias-disable;
};
};
I couldn't find any devicetree example of tca9539 which is using pinctrl. The
gpio-pca95xx.yaml DT binding does not match with any regex of the patterns
properties.
Thanks,
Ayushi
--
With best wishes
Dmitry
