Hello Tomi,

On 02/04/25 19:00, Tomi Valkeinen wrote:
The timings calculation gets it wrong for DSI event mode, resulting in
too large hbp value. Fix the issue by taking into account the
pulse/event mode difference.

Signed-off-by: Tomi Valkeinen <tomi.valkei...@ideasonboard.com>

Reviewed-by: Jayesh Choudhary <j-choudh...@ti.com>

---
  drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 33 ++++++++++++++++++--------
  1 file changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c 
b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
index 62811631341b..9797e6faa29d 100644
--- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
@@ -417,7 +417,8 @@
  #define DSI_OUTPUT_PORT                       0
  #define DSI_INPUT_PORT(inputid)               (1 + (inputid))
-#define DSI_HBP_FRAME_OVERHEAD 12
+#define DSI_HBP_FRAME_PULSE_OVERHEAD   12
+#define DSI_HBP_FRAME_EVENT_OVERHEAD   16


I have also observed this 4B discrepancy for event-mode after comparing
the dsi packet sizes for each line type as per the dsi specifications.

  #define DSI_HSA_FRAME_OVERHEAD                14
  #define DSI_HFP_FRAME_OVERHEAD                6
  #define DSI_HSS_VSS_VSE_FRAME_OVERHEAD        4
@@ -503,12 +504,18 @@ static int cdns_dsi_mode2cfg(struct cdns_dsi *dsi,
bpp = mipi_dsi_pixel_format_to_bpp(output->dev->format); - dsi_cfg->hbp = dpi_to_dsi_timing(dpi_hbp + (sync_pulse ? 0 : dpi_hsa),
-                                        bpp, DSI_HBP_FRAME_OVERHEAD);
+       if (sync_pulse) {
+               dsi_cfg->hbp = dpi_to_dsi_timing(dpi_hbp, bpp,
+                                                DSI_HBP_FRAME_PULSE_OVERHEAD);
- if (sync_pulse)
-               dsi_cfg->hsa =
-                       dpi_to_dsi_timing(dpi_hsa, bpp, DSI_HSA_FRAME_OVERHEAD);
+               dsi_cfg->hsa = dpi_to_dsi_timing(dpi_hsa, bpp,
+                                                DSI_HSA_FRAME_OVERHEAD);
+       } else {
+               dsi_cfg->hbp = dpi_to_dsi_timing(dpi_hbp + dpi_hsa, bpp,
+                                                DSI_HBP_FRAME_EVENT_OVERHEAD);
+
+               dsi_cfg->hsa = 0;
+       }
dsi_cfg->hact = dpi_to_dsi_timing(dpi_hact, bpp, 0); @@ -532,9 +539,12 @@ static int cdns_dsi_adjust_phy_config(struct cdns_dsi *dsi,
        unsigned int dsi_hfp_ext;
        unsigned int lanes = output->dev->lanes;
- dsi_htotal = dsi_cfg->hbp + DSI_HBP_FRAME_OVERHEAD;
-       if (output->dev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
+       if (output->dev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
+               dsi_htotal = dsi_cfg->hbp + DSI_HBP_FRAME_PULSE_OVERHEAD;
                dsi_htotal += dsi_cfg->hsa + DSI_HSA_FRAME_OVERHEAD;
+       } else {
+               dsi_htotal = dsi_cfg->hbp + DSI_HBP_FRAME_EVENT_OVERHEAD;
+       }
dsi_htotal += dsi_cfg->hact;
        dsi_htotal += dsi_cfg->hfp + DSI_HFP_FRAME_OVERHEAD;
@@ -607,9 +617,12 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi,
                return -EINVAL;
        }
- dsi_hss_hsa_hse_hbp = dsi_cfg->hbp + DSI_HBP_FRAME_OVERHEAD;
-       if (output->dev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
+       if (output->dev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
+               dsi_hss_hsa_hse_hbp = dsi_cfg->hbp + 
DSI_HBP_FRAME_PULSE_OVERHEAD;
                dsi_hss_hsa_hse_hbp += dsi_cfg->hsa + DSI_HSA_FRAME_OVERHEAD;
+       } else {
+               dsi_hss_hsa_hse_hbp = dsi_cfg->hbp + 
DSI_HBP_FRAME_EVENT_OVERHEAD;
+       }
/*
         * Make sure DPI(HFP) > DSI(HSS+HSA+HSE+HBP) to guarantee that the FIFO


Thanks,
Jayesh

Reply via email to