The driver uses crtc_* fields from the mode. While I think in the
enable-path this would be correct, I do not think it's correct in the
check phase, as the crtc hasn't had a chance to update the crtc_* fields
yet.
Overall, my understanding is that the crtc_* fields are relevant only in
cases where we have things like interlace or double pixel mode, where we
have a logical and real timings. We never use those with DSI, so the
crtc_* fields should just always match the normal values.
So, drop the use of crtc_* values.
Signed-off-by: Tomi Valkeinen <tomi.valkei...@ideasonboard.com>
---
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
index cf783680b1b4..220213f5cb09 100644
--- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
@@ -476,10 +476,10 @@ static int cdns_dsi_mode2cfg(struct cdns_dsi *dsi,
bool sync_pulse;
int bpp;
- dpi_hsa = mode->crtc_hsync_end - mode->crtc_hsync_start;
- dpi_hbp = mode->crtc_htotal - mode->crtc_hsync_end;
- dpi_hfp = mode->crtc_hsync_start - mode->crtc_hdisplay;
- dpi_hact = mode->crtc_hdisplay;
+ dpi_hsa = mode->hsync_end - mode->hsync_start;
+ dpi_hbp = mode->htotal - mode->hsync_end;
+ dpi_hfp = mode->hsync_start - mode->hdisplay;
+ dpi_hact = mode->hdisplay;
memset(dsi_cfg, 0, sizeof(*dsi_cfg));
@@ -540,11 +540,11 @@ static int cdns_dsi_adjust_phy_config(struct cdns_dsi
*dsi,
if (dsi_htotal % lanes)
adj_dsi_htotal += lanes - (dsi_htotal % lanes);
- dpi_hz = mode->crtc_clock * 1000;
+ dpi_hz = mode->clock * 1000;
dlane_bps = (unsigned long long)dpi_hz * adj_dsi_htotal;
/* data rate in bytes/sec is not an integer, refuse the mode. */
- dpi_htotal = mode->crtc_htotal;
+ dpi_htotal = mode->htotal;
if (do_div(dlane_bps, lanes * dpi_htotal))
return -EINVAL;
@@ -572,7 +572,7 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi,
if (ret)
return ret;
- ret = phy_mipi_dphy_get_default_config(mode->crtc_clock * 1000,
+ ret = phy_mipi_dphy_get_default_config(mode->clock * 1000,
mipi_dsi_pixel_format_to_bpp(output->dev->format),
nlanes, phy_cfg);
if (ret)
@@ -822,11 +822,11 @@ static void cdns_dsi_bridge_atomic_pre_enable(struct
drm_bridge *bridge,
writel(HFP_LEN(dsi_cfg.hfp) | HACT_LEN(dsi_cfg.hact),
dsi->regs + VID_HSIZE2);
- writel(VBP_LEN(mode->crtc_vtotal - mode->crtc_vsync_end - 1) |
- VFP_LEN(mode->crtc_vsync_start - mode->crtc_vdisplay) |
- VSA_LEN(mode->crtc_vsync_end - mode->crtc_vsync_start + 1),
+ writel(VBP_LEN(mode->vtotal - mode->vsync_end - 1) |
+ VFP_LEN(mode->vsync_start - mode->vdisplay) |
+ VSA_LEN(mode->vsync_end - mode->vsync_start + 1),
dsi->regs + VID_VSIZE1);
- writel(mode->crtc_vdisplay, dsi->regs + VID_VSIZE2);
+ writel(mode->vdisplay, dsi->regs + VID_VSIZE2);
tmp = dsi_cfg.htotal -
(dsi_cfg.hsa + DSI_BLANKING_FRAME_OVERHEAD +
--
2.43.0
