On Thu Apr 3, 2025 at 5:37 AM CEST, Andy Yan wrote: > From: Andy Yan <andy....@rock-chips.com> > > The Rockchip RK3588 SoC integrates the Synopsys DesignWare DPTX > controller. And this DPTX controller need share a USBDP PHY with > the USB 3.0 OTG controller during operation. > > Signed-off-by: Andy Yan <andy....@rock-chips.com> > Reviewed-by: Rob Herring (Arm) <r...@kernel.org> > > --- > > (no changes since v2) > > Changes in v2: > - Link to V1: > https://lore.kernel.org/linux-rockchip/20250223113036.74252-1-andys...@163.com/ > - Fix a character encoding issue > > .../display/rockchip/rockchip,dw-dp.yaml | 150 ++++++++++++++++++ > 1 file changed, 150 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml > > diff --git > a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml > b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml > new file mode 100644 > index 0000000000000..a8a0087179972 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml > @@ -0,0 +1,150 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-dp.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip DW DisplayPort Transmitter > + > +maintainers: > + - Andy Yan <andy....@rock-chips.com> > + > +description: | > + The Rockchip RK3588 SoC integrates the Synopsys DesignWare DPTX controller > + which is compliant with the DisplayPort Specification Version 1.4 with the > + following features: > + > + * DisplayPort 1.4a > + * Main Link: 1/2/4 lanes > + * Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps > + * AUX channel 1Mbps > + * Single Stream Transport(SST) > + * Multistream Transport (MST) > + * Type-C support (alternate mode) > + * HDCP 2.2, HDCP 1.3 > + * Supports up to 8/10 bits per color component > + * Supports RBG, YCbCr4:4:4, YCbCr4:2:2, YCbCr4:2:0 > + * Pixel clock up to 594MHz > + * I2S, SPDIF audio interface > + > +allOf: > + - $ref: /schemas/sound/dai-common.yaml# > + > +properties: > + compatible: > + enum: > + - rockchip,rk3588-dp > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: Peripheral/APB bus clock > + - description: DisplayPort AUX clock > + - description: HDCP clock > + - description: I2S interface clock > + - description: SPDIF interfce clock
s/interfce/interface/ Cheers, Diederik > + > + clock-names: > + items: > + - const: apb > + - const: aux > + - const: hdcp > + - const: i2s > + - const: spdif
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