On Mon, 10 Mar 2025 16:59:18 -0300
Ariel D'Alessandro <ariel.dalessan...@collabora.com> wrote:

> Both these functions write to MMU_AS_CONTROL register in the same way.
> Define a common _panfrost_mmu_as_control_write function with the shared
> code.
> 
> Signed-off-by: Ariel D'Alessandro <ariel.dalessan...@collabora.com>
> ---
>  drivers/gpu/drm/panfrost/panfrost_mmu.c | 33 ++++++++++++-------------
>  1 file changed, 16 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c 
> b/drivers/gpu/drm/panfrost/panfrost_mmu.c
> index 294f86b3c25e7..31df3a96f89bd 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c
> @@ -121,38 +121,37 @@ static int mmu_hw_do_operation(struct panfrost_device 
> *pfdev,
>       return ret;
>  }
>  
> -static void panfrost_mmu_enable(struct panfrost_device *pfdev, struct 
> panfrost_mmu *mmu)
> +static void
> +_panfrost_mmu_as_control_write(struct panfrost_device *pfdev, u32 as_nr,
> +                            u64 transtab, u64 memattr)

I'm honestly not convinced this is needed. Let's just stick to
panfrost_mmu_enable/disable().

>  {
> -     int as_nr = mmu->as;
> -     struct io_pgtable_cfg *cfg = &mmu->pgtbl_cfg;
> -     u64 transtab = cfg->arm_mali_lpae_cfg.transtab;
> -     u64 memattr = cfg->arm_mali_lpae_cfg.memattr;
> -
>       mmu_hw_do_operation_locked(pfdev, as_nr, 0, ~0ULL, 
> AS_COMMAND_FLUSH_MEM);
>  
>       mmu_write(pfdev, AS_TRANSTAB_LO(as_nr), lower_32_bits(transtab));
>       mmu_write(pfdev, AS_TRANSTAB_HI(as_nr), upper_32_bits(transtab));
>  
> -     /* Need to revisit mem attrs.
> -      * NC is the default, Mali driver is inner WT.
> -      */
>       mmu_write(pfdev, AS_MEMATTR_LO(as_nr), lower_32_bits(memattr));
>       mmu_write(pfdev, AS_MEMATTR_HI(as_nr), upper_32_bits(memattr));
>  
>       write_cmd(pfdev, as_nr, AS_COMMAND_UPDATE);
>  }
>  
> -static void panfrost_mmu_disable(struct panfrost_device *pfdev, u32 as_nr)
> +static void panfrost_mmu_enable(struct panfrost_device *pfdev, struct 
> panfrost_mmu *mmu)
>  {
> -     mmu_hw_do_operation_locked(pfdev, as_nr, 0, ~0ULL, 
> AS_COMMAND_FLUSH_MEM);
> -
> -     mmu_write(pfdev, AS_TRANSTAB_LO(as_nr), 0);
> -     mmu_write(pfdev, AS_TRANSTAB_HI(as_nr), 0);
> +     int as_nr = mmu->as;
> +     struct io_pgtable_cfg *cfg = &mmu->pgtbl_cfg;
> +     u64 transtab = cfg->arm_mali_lpae_cfg.transtab;
> +     u64 memattr = cfg->arm_mali_lpae_cfg.memattr;
>  
> -     mmu_write(pfdev, AS_MEMATTR_LO(as_nr), 0);
> -     mmu_write(pfdev, AS_MEMATTR_HI(as_nr), 0);
> +     /* Need to revisit mem attrs.
> +      * NC is the default, Mali driver is inner WT.
> +      */
> +     _panfrost_mmu_as_control_write(pfdev, as_nr, transtab, memattr);
> +}
>  
> -     write_cmd(pfdev, as_nr, AS_COMMAND_UPDATE);
> +static void panfrost_mmu_disable(struct panfrost_device *pfdev, u32 as_nr)
> +{
> +     _panfrost_mmu_as_control_write(pfdev, as_nr, 0, 0);
>  }
>  
>  u32 panfrost_mmu_as_get(struct panfrost_device *pfdev, struct panfrost_mmu 
> *mmu)

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