From: Alessandro Zini <alessandro.z...@siemens.com>

The h/vsync-disable properties are used to control whether to use or
not h/vsync signals, by configuring their pulse width to zero.

This is required on some panels which are driven in DE-only mode but do
not ignore sync packets, and instead require them to be low-voltage level
or ground.

Signed-off-by: Alessandro Zini <alessandro.z...@siemens.com>
---
 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c 
b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 95563aa1b450d..c94ea92159402 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -164,6 +164,8 @@ struct sn65dsi83 {
        int                             irq;
        struct delayed_work             monitor_work;
        struct work_struct              reset_work;
+       bool                            hsync_disable;
+       bool                            vsync_disable;
 };
 
 static const struct regmap_range sn65dsi83_readable_ranges[] = {
@@ -604,10 +606,12 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge 
*bridge,
        /* 32 + 1 pixel clock to ensure proper operation */
        le16val = cpu_to_le16(32 + 1);
        regmap_bulk_write(ctx->regmap, REG_VID_CHA_SYNC_DELAY_LOW, &le16val, 2);
-       le16val = cpu_to_le16(mode->hsync_end - mode->hsync_start);
+       le16val = cpu_to_le16(ctx->hsync_disable ?
+               0 : mode->hsync_end - mode->hsync_start);
        regmap_bulk_write(ctx->regmap, REG_VID_CHA_HSYNC_PULSE_WIDTH_LOW,
                          &le16val, 2);
-       le16val = cpu_to_le16(mode->vsync_end - mode->vsync_start);
+       le16val = cpu_to_le16(ctx->vsync_disable ?
+               0 : mode->vsync_end - mode->vsync_start);
        regmap_bulk_write(ctx->regmap, REG_VID_CHA_VSYNC_PULSE_WIDTH_LOW,
                          &le16val, 2);
        regmap_write(ctx->regmap, REG_VID_CHA_HORIZONTAL_BACK_PORCH,
@@ -867,6 +871,14 @@ static int sn65dsi83_parse_dt(struct sn65dsi83 *ctx, enum 
sn65dsi83_model model)
                }
        }
 
+       ctx->hsync_disable = false;
+       if (of_property_present(dev->of_node, "hsync-disable"))
+               ctx->hsync_disable = true;
+
+       ctx->vsync_disable = false;
+       if (of_property_present(dev->of_node, "vsync-disable"))
+               ctx->vsync_disable = true;
+
        panel_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 2, 0);
        if (IS_ERR(panel_bridge))
                return dev_err_probe(dev, PTR_ERR(panel_bridge), "Failed to get 
panel bridge\n");
-- 
2.48.1

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