From: Maud Spierings <maudspieri...@gocontroll.com>

Add the BOE av101hdt-a10 variant of the Moduline Display, this variant
comes with a 10.1 1280x720 display with a touchscreen (not working in
mainline).

Signed-off-by: Maud Spierings <maudspieri...@gocontroll.com>

---
Currently the backlight driver is not available, this will be upstreamed
in a future patch series. It is a Maxim max25014atg.

The touchscreen has a Cypress CYAT81658-64AS48 controller which as far as
I know is not supported upstream, the driver we currently use for this is
a mess and I doubt we will be able to get it in an upstreamable state.
---
 ...tx8p-ml81-moduline-display-106-av101hdt-a10.dts | 60 ++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git 
a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dts
 
b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dts
new file mode 100644
index 
0000000000000000000000000000000000000000..ce735b2fabcff2f1f03671e271af08f874276a73
--- /dev/null
+++ 
b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dts
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2025 GOcontroll B.V.
+ * Author: Maud Spierings <maudspieri...@gocontroll.com>
+ */
+
+/dts-v1/;
+
+#include "imx8mp-tx8p-ml81-moduline-display-106.dtsi"
+
+/ {
+       model = "GOcontroll Moduline Display with BOE av101hdt-a10 display";
+
+       panel {
+               compatible = "boe,av101hdt-a10";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_panel>;
+               enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+               reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+               power-supply = <&reg_3v3_per>;
+
+               port {
+                       panel_lvds_in: endpoint {
+                               remote-endpoint = <&ldb_lvds_ch0>;
+                       };
+               };
+       };
+};
+
+&lcdif2 {
+       status = "okay";
+};
+
+&lvds_bridge {
+       assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>,
+       <&clk IMX8MP_VIDEO_PLL1>;
+       assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
+       /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */
+       assigned-clock-rates = <0>, <1054620000>;
+       status = "okay";
+
+       ports {
+               port@1 {
+                       ldb_lvds_ch0: endpoint {
+                               remote-endpoint = <&panel_lvds_in>;
+                       };
+               };
+       };
+};
+
+&iomuxc {
+       pinctrl_panel: panelgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 /* COM pin 157 */
+                       MX8MP_DSE_X1
+                       MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 /* COM pin 159 */
+                       MX8MP_DSE_X1
+               >;
+       };
+};

-- 
2.48.1


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