On Fri, 21 Feb 2025 00:57:58 +0000, Andre Przywara wrote: > The Allwinner H6 and some later SoCs contain some bits in the PRCM (Power > Reset Clock Management) block that control some power domains. > Those power domains include the one for the GPU, the PLLs and some > analogue circuits. > > Signed-off-by: Andre Przywara <andre.przyw...@arm.com> > --- > .../power/allwinner,sun50i-h6-prcm-ppu.yaml | 42 +++++++++++++++++++ > 1 file changed, 42 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml >
Reviewed-by: Rob Herring (Arm) <r...@kernel.org>
