[PATCH 2/3] arm64: dts: renesas: r9a09g057: Add Mali-G31 GPU node

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com>

Add Mali-G31 GPU node to SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi 
b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 5d4d999b450e..4d5baed02fda 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -105,6 +105,35 @@ L3_CA55: cache-controller-0 {
                };
        };
 
+       gpu_opp_table: opp-table-1 {
+               compatible = "operating-points-v2";
+
+               opp-630000000 {
+                       opp-hz = /bits/ 64 <630000000>;
+                       opp-microvolt = <800000>;
+               };
+
+               opp-315000000 {
+                       opp-hz = /bits/ 64 <315000000>;
+                       opp-microvolt = <800000>;
+               };
+
+               opp-157500000 {
+                       opp-hz = /bits/ 64 <157500000>;
+                       opp-microvolt = <800000>;
+               };
+
+               opp-78750000 {
+                       opp-hz = /bits/ 64 <78750000>;
+                       opp-microvolt = <800000>;
+               };
+
+               opp-19687500 {
+                       opp-hz = /bits/ 64 <19687500>;
+                       opp-microvolt = <800000>;
+               };
+       };
+
        psci {
                compatible = "arm,psci-1.0", "arm,psci-0.2";
                method = "smc";
@@ -585,6 +614,28 @@ i2c8: i2c@11c01000 {
                        status = "disabled";
                };
 
+               gpu: gpu@14850000 {
+                       compatible = "renesas,r9a09g057-mali",
+                                    "arm,mali-bifrost";
+                       reg = <0x0 0x14850000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 884 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 885 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 883 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 886 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "job", "mmu", "gpu", "event";
+                       clocks = <&cpg CPG_MOD 0xf0>,
+                                <&cpg CPG_MOD 0xf1>,
+                                <&cpg CPG_MOD 0xf2>;
+                       clock-names = "gpu", "bus", "bus_ace";
+                       power-domains = <&cpg>;
+                       resets = <&cpg 0xdd>,
+                                <&cpg 0xde>,
+                                <&cpg 0xdf>;
+                       reset-names = "rst", "axi_rst", "ace_rst";
+                       operating-points-v2 = <&gpu_opp_table>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@14900000 {
                        compatible = "arm,gic-v3";
                        reg = <0x0 0x14900000 0 0x20000>,
-- 
2.43.0