Stop using deprecated API.
Used Coccinelle to make the change.

@rule_3@
identifier dsi_var;
identifier r;
identifier func;
type t;
position p;
expression dsi_device;
expression list es;
@@
t func(...) {
...
struct mipi_dsi_device *dsi_var = dsi_device;
+struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var };
<+...
(
-mipi_dsi_dcs_write_seq(dsi_var,es);
+mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es);
|
-r = mipi_dsi_dcs_exit_sleep_mode(dsi_var)@p;
+mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
|
-r = mipi_dsi_dcs_enter_sleep_mode(dsi_var)@p;
+mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
|
-r = mipi_dsi_dcs_set_display_off(dsi_var)@p;
+mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
|
.....//rest of the mipi APIs with _multi variant
)
<+...
-if(r < 0) {
-...
-}
...+>
}

Signed-off-by: Anusha Srivatsa <asriv...@redhat.com>
---
 drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c | 138 +++++++++++------------
 1 file changed, 67 insertions(+), 71 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c 
b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
index 
22a14006765ed23da23da9cb39c637913c4f3090..ccd8659f30529f58fb8ed013ccb792f2040b2f51
 100644
--- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
+++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
@@ -62,66 +62,75 @@ static inline struct xpp055c272 *panel_to_xpp055c272(struct 
drm_panel *panel)
 static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
 {
        struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+       struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
        struct device *dev = ctx->dev;
 
        /*
         * Init sequence was supplied by the panel vendor without much
         * documentation.
         */
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETMIPI,
-                              0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00,
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25,
-                              0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01,
-                              0x00, 0x00, 0x37);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETRGBIF,
-                              0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00,
-                              0x00, 0x00);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETSCR,
-                              0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
-                              0x00);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETEQ,
-                              0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
-                              0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPOWER,
-                              0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd,
-                              0x67, 0x77, 0x33, 0x33);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,
-                              0xff, 0x01, 0xff);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETEXTC, 0xf1,
+                                    0x12, 0x83);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETMIPI, 0x33,
+                                    0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00,
+                                    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44,
+                                    0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02,
+                                    0x4f, 0x01, 0x00, 0x00, 0x37);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETPOWER_EXT,
+                                    0x25);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETPCR, 0x02,
+                                    0x11, 0x00);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETRGBIF, 0x0c,
+                                    0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00,
+                                    0x00, 0x00);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETSCR, 0x73,
+                                    0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
+                                    0x00);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETVDC, 0x46);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETPANEL, 0x0b);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETCYC, 0x80);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETDISP, 0xc8,
+                                    0x12, 0x30);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETEQ, 0x07,
+                                    0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
+                                    0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETPOWER, 0x53,
+                                    0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd,
+                                    0x67, 0x77, 0x33, 0x33);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETECO, 0x00,
+                                    0x00, 0xff, 0xff, 0x01, 0xff);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETBGP, 0x09,
+                                    0x09);
        msleep(20);
 
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGIP1,
-                              0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12,
-                              0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18,
-                              0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80,
-                              0x01, 0x00, 0x00, 0x00, 0x48, 0xf8, 0x86, 0x42,
-                              0x08, 0x88, 0x88, 0x80, 0x88, 0x88, 0x88, 0x58,
-                              0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88,
-                              0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGIP2,
-                              0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
-                              0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35,
-                              0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f,
-                              0x88, 0x80, 0x24, 0x68, 0x88, 0x88, 0x84, 0x88,
-                              0x88, 0x88, 0x23, 0x10, 0x00, 0x00, 0x1c, 0x00,
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05,
-                              0xa0, 0x00, 0x00, 0x00, 0x00);
-       mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGAMMA,
-                              0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36,
-                              0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11,
-                              0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38,
-                              0x36, 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13,
-                              0x11, 0x18);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETVCOM, 0x87,
+                                    0x95);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETGIP1, 0xc2,
+                                    0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12,
+                                    0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37,
+                                    0x18, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00,
+                                    0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x48,
+                                    0xf8, 0x86, 0x42, 0x08, 0x88, 0x88, 0x80,
+                                    0x88, 0x88, 0x88, 0x58, 0xf8, 0x87, 0x53,
+                                    0x18, 0x88, 0x88, 0x81, 0x88, 0x88, 0x88,
+                                    0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+                                    0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETGIP2, 0x00,
+                                    0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
+                                    0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81,
+                                    0x35, 0x78, 0x88, 0x88, 0x85, 0x88, 0x88,
+                                    0x88, 0x0f, 0x88, 0x80, 0x24, 0x68, 0x88,
+                                    0x88, 0x84, 0x88, 0x88, 0x88, 0x23, 0x10,
+                                    0x00, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00,
+                                    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                                    0x00, 0x00, 0x00, 0x00, 0x30, 0x05, 0xa0,
+                                    0x00, 0x00, 0x00, 0x00);
+       mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETGAMMA, 0x00,
+                                    0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36,
+                                    0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13,
+                                    0x11, 0x18, 0x00, 0x06, 0x08, 0x2a, 0x31,
+                                    0x3f, 0x38, 0x36, 0x07, 0x0c, 0x0d, 0x11,
+                                    0x13, 0x12, 0x13, 0x11, 0x18);
 
        msleep(60);
 
@@ -133,17 +142,11 @@ static int xpp055c272_unprepare(struct drm_panel *panel)
 {
        struct xpp055c272 *ctx = panel_to_xpp055c272(panel);
        struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
-       int ret;
+       struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
 
-       ret = mipi_dsi_dcs_set_display_off(dsi);
-       if (ret < 0)
-               dev_err(ctx->dev, "failed to set display off: %d\n", ret);
+       mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
 
-       mipi_dsi_dcs_enter_sleep_mode(dsi);
-       if (ret < 0) {
-               dev_err(ctx->dev, "failed to enter sleep mode: %d\n", ret);
-               return ret;
-       }
+       mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
 
        regulator_disable(ctx->iovcc);
        regulator_disable(ctx->vci);
@@ -155,6 +158,7 @@ static int xpp055c272_prepare(struct drm_panel *panel)
 {
        struct xpp055c272 *ctx = panel_to_xpp055c272(panel);
        struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+       struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
        int ret;
 
        dev_dbg(ctx->dev, "Resetting the panel\n");
@@ -183,20 +187,12 @@ static int xpp055c272_prepare(struct drm_panel *panel)
                goto disable_iovcc;
        }
 
-       ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
-       if (ret < 0) {
-               dev_err(ctx->dev, "Failed to exit sleep mode: %d\n", ret);
-               goto disable_iovcc;
-       }
+       mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
 
        /* T9: 120ms */
        msleep(120);
 
-       ret = mipi_dsi_dcs_set_display_on(dsi);
-       if (ret < 0) {
-               dev_err(ctx->dev, "Failed to set display on: %d\n", ret);
-               goto disable_iovcc;
-       }
+       mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
 
        msleep(50);
 

-- 
2.47.0

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