On 2/12/2025 4:04 PM, Dmitry Baryshkov wrote:
On Wed, Feb 12, 2025 at 03:03:47PM -0800, James A. MacInnes wrote:
Type-C DisplayPort inoperable due to incorrect porch settings.
- Re-used wide_bus_en as flag to prevent porch shifting

Unfortunately I don't know enough details to comment on this change.
Maybe Abhinav can check it. I can only notice that msm-4.14 disables
programmable_fetch_config for non-DSI calls. Would disabling that call
for DP interface fix your issue?


Yes, this piece of timing adjustment matches what we have even without widebus.

I do agree about the programmable fetch that it is enabled only on DSI even on the latest kernels.

698     if (phys_enc->hw_intf->cap->type == INTF_DSI)
699             programmable_fetch_config(phys_enc, &timing_params);

We can try if that works.


Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
Signed-off-by: James A. MacInnes <james.a.macin...@gmail.com>
---
  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 14 +++++++++-----
  1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index abd6600046cb..a21addc4794f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -94,17 +94,21 @@ static void drm_mode_to_intf_timing_params(
                timing->vsync_polarity = 0;
        }
- /* for DP/EDP, Shift timings to align it to bottom right */
-       if (phys_enc->hw_intf->cap->type == INTF_DP) {
+       timing->wide_bus_en = dpu_encoder_is_widebus_enabled(phys_enc->parent);
+       timing->compression_en = dpu_encoder_is_dsc_enabled(phys_enc->parent);
+
+       /*
+        *  For DP/EDP, Shift timings to align it to bottom right.
+        *  wide_bus_en is set for everything excluding SDM845 &
+        *  porch changes cause DisplayPort failure and HDMI tearing.
+        */
+       if (phys_enc->hw_intf->cap->type == INTF_DP && timing->wide_bus_en) {
                timing->h_back_porch += timing->h_front_porch;
                timing->h_front_porch = 0;
                timing->v_back_porch += timing->v_front_porch;
                timing->v_front_porch = 0;
        }
- timing->wide_bus_en = dpu_encoder_is_widebus_enabled(phys_enc->parent);
-       timing->compression_en = dpu_encoder_is_dsc_enabled(phys_enc->parent);
-
        /*
         * for DP, divide the horizonal parameters by 2 when
         * widebus is enabled

--
2.43.0



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