On Mon, Sep 30, 2024 at 03:30:45PM +0200, Philippe Simons wrote:
> tested on 6.12-rc1 with RG35XX-H
> 
> Tested-by: Philippe Simons <simons.phili...@gmail.com>
> 
> On 29/09/2024 11:04, Ryan Walklin wrote:
> > Hi,
> > 
> > V5 of this patch series adding support for the Allwinner DE33 display 
> > engine variant. V5 is rebased on torvalds/master as of today with the 6.12 
> > drm-next patches included, with no code changes required. V3 and V4 were in 
> > turn rebased on top of the layer init and modesetting changes merged for 
> > 6.11. No functional changes from V4, fixes and reviews from previous V1-4 
> > added, and relevant issues found by checkpatch.pl corrected.
> > 
> > Original blurb below:
> > 
> > There is existing mainline support for the DE2 and DE3 AllWinner display 
> > pipeline IP blocks, used in the A64 and H6 among others, however the H700 
> > (as well as the H616/H618 and the T507 automotive SoC) have a newer version 
> > of the Display Engine (v3.3/DE33) which adds additional high-resolution 
> > support as well as YUV colour formats and AFBC compression support.
> > 
> > This patch set adds DE33 support, following up from the previous RFC [1], 
> > with significant rework to break down the previous relatively complex set 
> > into more logical steps, detailed below.
> > 
> > 1. Refactor the existing DE2/DE3 code in readiness to support YUV colour 
> > formats in the DE3 engine (patches 1-4).
> > 2. Add YUV420 colour format support in the DE3 driver (patches 5-12).
> > 3. Replace the is_de3 mixer flag with an enum to support multiple DE 
> > versions (patch 13).
> > 4. Refactor the mixer, vi_scaler and some register code to merge common 
> > init code and more easily support multiple DE versions (patches 14-17).
> > 5. Add Arm Frame Buffer Compression (AFBC) compressed buffer support to the 
> > DE3 driver. This is currently only supported for VI layers (for HW-decoded 
> > video output) but is well integrated into these changes and a subsequent 
> > patchset to enable the Video Engine is planned. (patch 18).
> > 6. Add DT bindings for the DE33 engine. (patches 19-21).
> > 7. Extend the DE2/3 driver for the DE33, comprising clock, mixer, 
> > vi_scaler, fmt and csc module support (patches 22-26).
> > 
> > Further patchsets are planned to support HDMI and the LCD timing controller 
> > present in these SoCs.
> > 
> > Regards,
> > 
> > Ryan
> > 
> > Jernej Skrabec (22):
> >    drm: sun4i: de2/de3: Change CSC argument
> >    drm: sun4i: de2/de3: Merge CSC functions into one
> >    drm: sun4i: de2/de3: call csc setup also for UI layer
> >    drm: sun4i: de2: Initialize layer fields earlier
> >    drm: sun4i: de3: Add YUV formatter module
> >    drm: sun4i: de3: add format enumeration function to engine
> >    drm: sun4i: de3: add formatter flag to mixer config
> >    drm: sun4i: de3: add YUV support to the DE3 mixer
> >    drm: sun4i: de3: pass engine reference to ccsc setup function
> >    drm: sun4i: de3: add YUV support to the color space correction module
> >    drm: sun4i: de3: add YUV support to the TCON
> >    drm: sun4i: support YUV formats in VI scaler
> >    drm: sun4i: de2/de3: add mixer version enum
> >    drm: sun4i: de2/de3: refactor mixer initialisation
> >    drm: sun4i: vi_scaler refactor vi_scaler enablement
> >    drm: sun4i: de2/de3: add generic blender register reference function
> >    drm: sun4i: de2/de3: use generic register reference function for layer
> >      configuration
> >    drm: sun4i: de3: Implement AFBC support
> >    drm: sun4i: de33: mixer: add Display Engine 3.3 (DE33) support
> >    drm: sun4i: de33: vi_scaler: add Display Engine 3.3 (DE33) support
> >    drm: sun4i: de33: fmt: add Display Engine 3.3 (DE33) support
> >    drm: sun4i: de33: csc: add Display Engine 3.3 (DE33) support
> > 
> > Ryan Walklin (4):
> >    dt-bindings: allwinner: add H616 DE33 bus binding
> >    dt-bindings: allwinner: add H616 DE33 clock binding
> >    dt-bindings: allwinner: add H616 DE33 mixer binding
> >    clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support
> > 
> >   .../bus/allwinner,sun50i-a64-de2.yaml         |   4 +-
> >   .../clock/allwinner,sun8i-a83t-de2-clk.yaml   |   1 +
> >   .../allwinner,sun8i-a83t-de2-mixer.yaml       |   1 +
> >   drivers/clk/sunxi-ng/ccu-sun8i-de2.c          |  25 ++
> >   drivers/gpu/drm/sun4i/Makefile                |   3 +-
> >   drivers/gpu/drm/sun4i/sun4i_tcon.c            |  26 +-
> >   drivers/gpu/drm/sun4i/sun50i_afbc.c           | 250 +++++++++++++
> >   drivers/gpu/drm/sun4i/sun50i_afbc.h           |  87 +++++
> >   drivers/gpu/drm/sun4i/sun50i_fmt.c            |  99 +++++
> >   drivers/gpu/drm/sun4i/sun50i_fmt.h            |  33 ++
> >   drivers/gpu/drm/sun4i/sun8i_csc.c             | 341 +++++++++++++++---
> >   drivers/gpu/drm/sun4i/sun8i_csc.h             |  20 +-
> >   drivers/gpu/drm/sun4i/sun8i_mixer.c           | 226 +++++++++---
> >   drivers/gpu/drm/sun4i/sun8i_mixer.h           |  31 +-
> >   drivers/gpu/drm/sun4i/sun8i_ui_layer.c        |  41 ++-
> >   drivers/gpu/drm/sun4i/sun8i_ui_scaler.c       |   2 +-
> >   drivers/gpu/drm/sun4i/sun8i_vi_layer.c        | 133 +++++--
> >   drivers/gpu/drm/sun4i/sun8i_vi_scaler.c       | 115 ++++--
> >   drivers/gpu/drm/sun4i/sun8i_vi_scaler.h       |   2 +-
> >   drivers/gpu/drm/sun4i/sunxi_engine.h          |  34 ++
> >   20 files changed, 1269 insertions(+), 205 deletions(-)
> >   create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.c
> >   create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.h
> >   create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.c
> >   create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.h
> > 

I just wanted to add my Tested-By to this patch series. That said, I can confirm
that we also need to add support for the clock and reset before we activate the
display engine. I'll submit patches for that in a different series (it's a
pre-requisite of this but can be done independently).

Additionally, I do have a few comments on the yaml documentation.

Tested-by: Chris Morgan <macromor...@hotmail.com>

Thank you,
Chris

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