On Thu, 2010-09-02 at 21:32 -0400, Alex Deucher wrote:
> These VGT regs need to be programmed via the ring rather than
> MMIO as on previous asics (r6xx/r7xx).
> 

So we need someway for userspace to know this has happened, either a
version bump or a change to the info ioctl again.

Dave.

> Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
> ---
>  drivers/gpu/drm/radeon/evergreen.c |   39 
> +++++++++++++++++++++++++++++++++++-
>  drivers/gpu/drm/radeon/r600.c      |    5 +---
>  2 files changed, 39 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/radeon/evergreen.c 
> b/drivers/gpu/drm/radeon/evergreen.c
> index 875d891..7b81e5c 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -1110,6 +1110,43 @@ static int evergreen_cp_load_microcode(struct 
> radeon_device *rdev)
>       return 0;
>  }
>  
> +static int evergreen_cp_start(struct radeon_device *rdev)
> +{
> +     int r;
> +     uint32_t cp_me;
> +
> +     r = radeon_ring_lock(rdev, 7);
> +     if (r) {
> +             DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r);
> +             return r;
> +     }
> +     radeon_ring_write(rdev, PACKET3(PACKET3_ME_INITIALIZE, 5));
> +     radeon_ring_write(rdev, 0x1);
> +     radeon_ring_write(rdev, 0x0);
> +     radeon_ring_write(rdev, rdev->config.evergreen.max_hw_contexts - 1);
> +     radeon_ring_write(rdev, PACKET3_ME_INITIALIZE_DEVICE_ID(1));
> +     radeon_ring_write(rdev, 0);
> +     radeon_ring_write(rdev, 0);
> +     radeon_ring_unlock_commit(rdev);
> +
> +     cp_me = 0xff;
> +     WREG32(CP_ME_CNTL, cp_me);
> +
> +     r = radeon_ring_lock(rdev, 4);
> +     if (r) {
> +             DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r);
> +             return r;
> +     }
> +     /* init some VGT regs */
> +     radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
> +     radeon_ring_write(rdev, (VGT_VERTEX_REUSE_BLOCK_CNTL - 
> PACKET3_SET_CONTEXT_REG_START) >> 2);
> +     radeon_ring_write(rdev, 0xe);
> +     radeon_ring_write(rdev, 0x10);
> +     radeon_ring_unlock_commit(rdev);
> +
> +     return 0;
> +}
> +
>  int evergreen_cp_resume(struct radeon_device *rdev)
>  {
>       u32 tmp;
> @@ -1165,7 +1202,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
>       rdev->cp.rptr = RREG32(CP_RB_RPTR);
>       rdev->cp.wptr = RREG32(CP_RB_WPTR);
>  
> -     r600_cp_start(rdev);
> +     evergreen_cp_start(rdev);
>       rdev->cp.ready = true;
>       r = radeon_ring_test(rdev);
>       if (r) {
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index 73e6a1a..f280717 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -2120,10 +2120,7 @@ int r600_cp_start(struct radeon_device *rdev)
>       }
>       radeon_ring_write(rdev, PACKET3(PACKET3_ME_INITIALIZE, 5));
>       radeon_ring_write(rdev, 0x1);
> -     if (rdev->family >= CHIP_CEDAR) {
> -             radeon_ring_write(rdev, 0x0);
> -             radeon_ring_write(rdev, rdev->config.evergreen.max_hw_contexts 
> - 1);
> -     } else if (rdev->family >= CHIP_RV770) {
> +     if (rdev->family >= CHIP_RV770) {
>               radeon_ring_write(rdev, 0x0);
>               radeon_ring_write(rdev, rdev->config.rv770.max_hw_contexts - 1);
>       } else {


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