On Wed, 22 Jan 2025, Suraj Kandpal <suraj.kand...@intel.com> wrote:
> Usually retimers take around 30 to 40ms to exit all devices from
> sleep state. Extended wake timeout mechanism helps to give
> that additional time.
>
> --v2
> -Grant the requested time only if greater than 1ms [Arun/Jani]
> -Reframe commit message [Arun]
>
> --v3
> -Move the function to drm_core [Dmitry/Jani]
>
> Spec: DP v2.1 Section 3.6.12.3
> Signed-off-by: Suraj Kandpal <suraj.kand...@intel.com>
> Reviewed-by: Arun R Murthy <arun.r.mur...@intel.com>

Acked-by: Jani Nikula <jani.nik...@intel.com>

for merging this via drm-misc-next along with the rest of the series.


> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c              | 4 ++++
>  drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp_link_training.h | 1 +
>  3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 3693b36b9336..3b29a1b90fa6 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2594,6 +2594,7 @@ static void mtl_ddi_pre_enable_dp(struct 
> intel_atomic_state *state,
>  {
>       struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>       bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
> +     bool transparent_mode;
>       int ret;
>  
>       intel_dp_set_link_params(intel_dp,
> @@ -2645,6 +2646,9 @@ static void mtl_ddi_pre_enable_dp(struct 
> intel_atomic_state *state,
>       if (!is_mst)
>               intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
>  
> +     transparent_mode = intel_dp_lttpr_transparent_mode_enabled(intel_dp);
> +     drm_dp_lttpr_wake_timeout_setup(&intel_dp->aux, transparent_mode);
> +
>       intel_dp_configure_protocol_converter(intel_dp, crtc_state);
>       if (!is_mst)
>               intel_dp_sink_enable_decompression(state,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 8b1977cfec50..c0f8473e7223 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -128,7 +128,7 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp 
> *intel_dp, bool enable)
>       return true;
>  }
>  
> -static bool intel_dp_lttpr_transparent_mode_enabled(struct intel_dp 
> *intel_dp)
> +bool intel_dp_lttpr_transparent_mode_enabled(struct intel_dp *intel_dp)
>  {
>       return intel_dp->lttpr_common_caps[DP_PHY_REPEATER_MODE -
>                                          
> DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] ==
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h 
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> index 2066b9146762..46614124569f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> @@ -15,6 +15,7 @@ struct intel_dp;
>  
>  int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 
> dpcd[DP_RECEIVER_CAP_SIZE]);
>  int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
> +bool intel_dp_lttpr_transparent_mode_enabled(struct intel_dp *intel_dp);
>  
>  void intel_dp_link_training_set_mode(struct intel_dp *intel_dp,
>                                    int link_rate, bool is_vrr);

-- 
Jani Nikula, Intel

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