On Tue, Jan 14, 2025 at 04:53:10PM -0800, Abhinav Kumar wrote:
>
>
> On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
> > The max_per_pipe_ib is a constant across all CRTCs and is read from the
> > catalog. The override value is also applied at the
> > _dpu_core_perf_crtc_update_bus() time. Drop corresponding calculations
> > and read the value directly at icc_set_bw() time.
> >
> > Suggested-by: Konrad Dybcio <konrad.dyb...@linaro.org>
> > Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 16 ++++------------
> > drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 2 --
> > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
> > 3 files changed, 4 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> > index
> > 913eb4c01abe10c1ed84215fbbee50abd69e9317..62dab5883513dc570076da5a64e32e502dd4320b
> > 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> > @@ -105,12 +105,10 @@ static void _dpu_core_perf_calc_crtc(const struct
> > dpu_core_perf *core_perf,
> > }
> > perf->bw_ctl = _dpu_core_perf_calc_bw(perf_cfg, crtc);
> > - perf->max_per_pipe_ib = perf_cfg->min_dram_ib;
> > perf->core_clk_rate = _dpu_core_perf_calc_clk(perf_cfg, crtc, state);
> > DRM_DEBUG_ATOMIC(
> > - "crtc=%d clk_rate=%llu core_ib=%u core_ab=%u\n",
> > + "crtc=%d clk_rate=%llu core_ab=%u\n",
> > crtc->base.id, perf->core_clk_rate,
> > - perf->max_per_pipe_ib,
> > (u32)DIV_ROUND_UP_ULL(perf->bw_ctl, 1000));
> > }
> > @@ -126,9 +124,6 @@ static void dpu_core_perf_aggregate(struct drm_device
> > *ddev,
> > curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) {
> > dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);
> > - perf->max_per_pipe_ib = max(perf->max_per_pipe_ib,
> > -
> > dpu_cstate->new_perf.max_per_pipe_ib);
>
> During the enabled cases, this is fine since even if one crtc is enabled,
> its going to use the same value.
>
> During disable to enable and enable to disable transitions, we do need to
> make it 0 right?
Good point, I will check that later.
>
> OR if its already being made 0, we need to make sure it gets updated by
> forcing update_bus to true?
>
> Is this part being handled by this block dpu_core_perf_crtc_update()?
>
> } else {
> DRM_DEBUG_ATOMIC("crtc=%d disable\n", crtc->base.id);
> memset(old, 0, sizeof(*old));
> update_bus = true;
> update_clk = true;
> }
>
> Please confirm this, I am fine with this change otherwise.
>
> > -
> > perf->bw_ctl += dpu_cstate->new_perf.bw_ctl;
> > DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n",
> > @@ -204,7 +199,7 @@ static int _dpu_core_perf_crtc_update_bus(struct
> > dpu_kms *kms,
> > dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc),
> > &perf);
> > avg_bw = div_u64(perf.bw_ctl, 1000); /*Bps_to_icc*/
> > - peak_bw = perf.max_per_pipe_ib;
> > + peak_bw = kms->catalog->perf->min_dram_ib;
> > if (kms->perf.fix_core_ab_vote)
> > avg_bw = kms->perf.fix_core_ab_vote;
> > @@ -315,15 +310,12 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
> > * 2. new bandwidth vote - "ab or ib vote" is lower
> > * than current vote at end of commit or stop.
> > */
> > - if ((params_changed && ((new->bw_ctl > old->bw_ctl) ||
> > - (new->max_per_pipe_ib > old->max_per_pipe_ib))) ||
> > - (!params_changed && ((new->bw_ctl < old->bw_ctl) ||
> > - (new->max_per_pipe_ib < old->max_per_pipe_ib)))) {
> > + if ((params_changed && new->bw_ctl > old->bw_ctl) ||
> > + (!params_changed && new->bw_ctl < old->bw_ctl)) {
> > DRM_DEBUG_ATOMIC("crtc=%d p=%d
> > new_bw=%llu,old_bw=%llu\n",
> > crtc->base.id, params_changed,
> > new->bw_ctl, old->bw_ctl);
> > old->bw_ctl = new->bw_ctl;
> > - old->max_per_pipe_ib = new->max_per_pipe_ib;
> > update_bus = true;
> > }
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
> > index
> > 9d8516ca32d162b1e277ec88067e5c21abeb2017..863a6fc1f30c21cf2030a30be5fe62b024b3b820
> > 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
> > @@ -14,12 +14,10 @@
> > /**
> > * struct dpu_core_perf_params - definition of performance parameters
> > - * @max_per_pipe_ib: maximum instantaneous bandwidth request
> > * @bw_ctl: arbitrated bandwidth request
> > * @core_clk_rate: core clock rate request
> > */
> > struct dpu_core_perf_params {
> > - u32 max_per_pipe_ib;
> > u64 bw_ctl;
> > u64 core_clk_rate;
> > };
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > index
> > ac3c6c5ad1cec3856f0eff2ed71153d3c2dc279e..cc240d3c7faa89254a575237634d0d0fa8f04f73
> > 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > @@ -1488,8 +1488,6 @@ static int dpu_crtc_debugfs_state_show(struct
> > seq_file *s, void *v)
> > dpu_crtc->cur_perf.core_clk_rate);
> > seq_printf(s, "bw_ctl: %uk\n",
> > (u32)DIV_ROUND_UP_ULL(dpu_crtc->cur_perf.bw_ctl, 1000));
> > - seq_printf(s, "max_per_pipe_ib: %u\n",
> > - dpu_crtc->cur_perf.max_per_pipe_ib);
> > return 0;
> > }
> >
--
With best wishes
Dmitry
