The code in dpu_core_perf_crtc_check() mostly duplicates code in
dpu_core_perf_aggregate(). Remove the duplication by reusing the latter
function.

Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 94 +++++++++++----------------
 1 file changed, 38 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 
c7ac1140e79dbf48566a89fa4d70f6bec69d1d81..f0d490afb53be2f4bc706af91da05bb893a5fe34
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -140,6 +140,30 @@ static void _dpu_core_perf_calc_crtc(const struct 
dpu_core_perf *core_perf,
                        perf->max_per_pipe_ib, perf->bw_ctl);
 }
 
+static void dpu_core_perf_aggregate(struct drm_device *ddev,
+                                   enum dpu_crtc_client_type curr_client_type,
+                                   struct dpu_core_perf_params *perf)
+{
+       struct dpu_crtc_state *dpu_cstate;
+       struct drm_crtc *tmp_crtc;
+
+       drm_for_each_crtc(tmp_crtc, ddev) {
+               if (tmp_crtc->enabled &&
+                   curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) {
+                       dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);
+
+                       perf->max_per_pipe_ib = max(perf->max_per_pipe_ib,
+                                                   
dpu_cstate->new_perf.max_per_pipe_ib);
+
+                       perf->bw_ctl += dpu_cstate->new_perf.bw_ctl;
+
+                       DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n",
+                                        tmp_crtc->base.id,
+                                        dpu_cstate->new_perf.bw_ctl);
+               }
+       }
+}
+
 /**
  * dpu_core_perf_crtc_check - validate performance of the given crtc state
  * @crtc: Pointer to crtc
@@ -150,11 +174,9 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
                struct drm_crtc_state *state)
 {
        u32 bw, threshold;
-       u64 bw_sum_of_intfs = 0;
-       enum dpu_crtc_client_type curr_client_type;
        struct dpu_crtc_state *dpu_cstate;
-       struct drm_crtc *tmp_crtc;
        struct dpu_kms *kms;
+       struct dpu_core_perf_params perf;
 
        if (!crtc || !state) {
                DPU_ERROR("invalid crtc\n");
@@ -172,68 +194,28 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
        /* obtain new values */
        _dpu_core_perf_calc_crtc(&kms->perf, crtc, state, 
&dpu_cstate->new_perf);
 
-       bw_sum_of_intfs = dpu_cstate->new_perf.bw_ctl;
-       curr_client_type = dpu_crtc_get_client_type(crtc);
-
-       drm_for_each_crtc(tmp_crtc, crtc->dev) {
-               if (tmp_crtc->enabled &&
-                   dpu_crtc_get_client_type(tmp_crtc) == curr_client_type &&
-                   tmp_crtc != crtc) {
-                       struct dpu_crtc_state *tmp_cstate =
-                               to_dpu_crtc_state(tmp_crtc->state);
-
-                       DRM_DEBUG_ATOMIC("crtc:%d bw:%llu ctrl:%d\n",
-                                        tmp_crtc->base.id, 
tmp_cstate->new_perf.bw_ctl,
-                                        tmp_cstate->bw_control);
-
-                       bw_sum_of_intfs += tmp_cstate->new_perf.bw_ctl;
-               }
+       dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), 
&perf);
 
-               /* convert bandwidth to kb */
-               bw = DIV_ROUND_UP_ULL(bw_sum_of_intfs, 1000);
-               DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw);
+       /* convert bandwidth to kb */
+       bw = DIV_ROUND_UP_ULL(perf.bw_ctl, 1000);
+       DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw);
 
-               threshold = kms->perf.perf_cfg->max_bw_high;
+       threshold = kms->perf.perf_cfg->max_bw_high;
 
-               DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold);
+       DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold);
 
-               if (!threshold) {
-                       DPU_ERROR("no bandwidth limits specified\n");
-                       return -E2BIG;
-               } else if (bw > threshold) {
-                       DPU_ERROR("exceeds bandwidth: %ukb > %ukb\n", bw,
-                                       threshold);
-                       return -E2BIG;
-               }
+       if (!threshold) {
+               DPU_ERROR("no bandwidth limits specified\n");
+               return -E2BIG;
+       } else if (bw > threshold) {
+               DPU_ERROR("exceeds bandwidth: %ukb > %ukb\n", bw,
+                               threshold);
+               return -E2BIG;
        }
 
        return 0;
 }
 
-static void dpu_core_perf_aggregate(struct drm_device *ddev,
-                                   enum dpu_crtc_client_type curr_client_type,
-                                   struct dpu_core_perf_params *perf)
-{
-       struct dpu_crtc_state *dpu_cstate;
-       struct drm_crtc *tmp_crtc;
-
-       drm_for_each_crtc(tmp_crtc, ddev) {
-               if (tmp_crtc->enabled &&
-                   curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) {
-                       dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);
-
-                       perf->max_per_pipe_ib = max(perf->max_per_pipe_ib,
-                                                   
dpu_cstate->new_perf.max_per_pipe_ib);
-
-                       perf->bw_ctl += dpu_cstate->new_perf.bw_ctl;
-
-                       DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n",
-                                        tmp_crtc->base.id,
-                                        dpu_cstate->new_perf.bw_ctl);
-               }
-       }
-}
-
 static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
                                          struct drm_crtc *crtc)
 {

-- 
2.39.5

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