[PATCH v2] drm/bridge: ite-it6263: Support VESA-24 input format

[tomm . merciai]

From: Tommaso Merciai <tommaso.merciai...@bp.renesas.com>

Introduce it6263_is_input_bus_fmt_valid() and refactor the
it6263_bridge_atomic_get_input_bus_fmts() function to support VESA-24
format by selecting the LVDS input format based on the LVDS data mapping
and thereby support both JEIDA-24 and VESA-24 input formats.

Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
Signed-off-by: Tommaso Merciai <tommaso.merciai...@bp.renesas.com>
---
Changes since v1:
 - Inline it6263_is_input_bus_fmt_valid() as suggested by LYing
 - Fixed it6263_is_input_bus_fmt_valid() param from u32 to int as suggested by 
LYing
 - Fixed commit msg as suggested by LYing
 - Fixed commit body as suggested by LYing
 - Collected DBaryshkov tag

 drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/bridge/ite-it6263.c 
b/drivers/gpu/drm/bridge/ite-it6263.c
index cbabd4e20d3e..3fc5c6795487 100644
--- a/drivers/gpu/drm/bridge/ite-it6263.c
+++ b/drivers/gpu/drm/bridge/ite-it6263.c
@@ -48,6 +48,7 @@
 #define  REG_COL_DEP                   GENMASK(1, 0)
 #define  BIT8                          FIELD_PREP(REG_COL_DEP, 1)
 #define  OUT_MAP                       BIT(4)
+#define  VESA                          BIT(4)
 #define  JEIDA                         0
 #define  REG_DESSC_ENB                 BIT(6)
 #define  DMODE                         BIT(7)
@@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it)
        fsleep(10000);
 }
 
+static inline bool it6263_is_input_bus_fmt_valid(int input_fmt)
+{
+       switch (input_fmt) {
+       case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+       case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+               return true;
+       }
+       return false;
+}
+
 static inline void it6263_lvds_set_interface(struct it6263 *it)
 {
+       u8 fmt;
+
        /* color depth */
        regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8);
+
+       if (it->lvds_data_mapping == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG)
+               fmt = VESA;
+       else
+               fmt = JEIDA;
+
        /* output mapping */
-       regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, JEIDA);
+       regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, fmt);
 
        if (it->lvds_dual_link) {
                regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, DISO);
@@ -714,14 +733,14 @@ it6263_bridge_atomic_get_input_bus_fmts(struct drm_bridge 
*bridge,
 
        *num_input_fmts = 0;
 
-       if (it->lvds_data_mapping != MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA)
+       if (!it6263_is_input_bus_fmt_valid(it->lvds_data_mapping))
                return NULL;
 
        input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL);
        if (!input_fmts)
                return NULL;
 
-       input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
+       input_fmts[0] = it->lvds_data_mapping;
        *num_input_fmts = 1;
 
        return input_fmts;
-- 
2.34.1