On Mon, 25 Nov 2024 14:49:28 +0100, Sean Nyekjaer wrote: > When using the DSI interface via DSI2LVDS bridge, it seems a bit harsh > to reguire the requested and the actual px clock to be within > 50Hz. A typical LVDS display requires the px clock to be within +-10%. > > In case for HDMI .5% tolerance is required. > > [ ... ]
Reviewed-by: Maxime Ripard <mrip...@kernel.org> Thanks! Maxime
