From: Li Liu <quic_ll...@quicinc.com>
Add display MDSS and DSI configuration for QCS615 RIDE board.
QCS615 has a DP port, and DP support will be added in a later patch.
Signed-off-by: Li Liu <quic_ll...@quicinc.com>
Signed-off-by: Fange Zhang <quic_fan...@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 76 ++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
index
ee6cab3924a6d71f29934a8debba3a832882abdd..cc7dadc411ab79b9e60ccb15eaff84ea5f997c4c
100644
--- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
@@ -202,6 +202,82 @@ &gcc {
<&sleep_clk>;
};
+&i2c2 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ ioexp: gpio@3e {
+ compatible = "semtech,sx1509q";
+ reg = <0x3e>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <58 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ semtech,probe-reset;
+ };
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9542";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ anx7625@58 {
+ compatible = "analogix,anx7625";
+ reg = <0x58>;
+ interrupt-parent = <&ioexp>;
+ interrupts = <0 0>;
+ enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+ wakeup-source;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ anx_7625_in: endpoint {
+ remote-endpoint =
<&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ anx_7625_out: endpoint {
+ };
+ };
+ };
+ };
+ };
+ };
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ vdda-supply = <&vreg_l11a>;
+ status = "okay";
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <&anx_7625_in>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+ vdds-supply = <&vreg_l5a>;
+ status = "okay";
+};
+
&qupv3_id_0 {
status = "okay";
};
--
2.34.1
