On 9/6/24 10:40 AM, Krzysztof Kozlowski wrote: > On Fri, Sep 06, 2024 at 04:17:41AM +0300, Cristian Ciocaltea wrote: >> Rockchip RK3588 SoC integrates the Synopsys DesignWare HDMI 2.1 >> Quad-Pixel (QP) TX controller IP. >> >> Since this is a new IP block, quite different from those used in the >> previous generations of Rockchip SoCs, add a dedicated binding file. >> >> Signed-off-by: Cristian Ciocaltea <cristian.ciocal...@collabora.com> >> --- >> .../rockchip/rockchip,rk3588-dw-hdmi-qp.yaml | 189 >> +++++++++++++++++++++ >> 1 file changed, 189 insertions(+) >> >> diff --git >> a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml >> >> b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml >> new file mode 100644 >> index 000000000000..37467685621d >> --- /dev/null >> +++ >> b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml > > ... > >> + >> + power-domains: >> + maxItems: 1 >> + >> + resets: >> + minItems: 2 > > You can drop minItems.
Dropped in upcoming v7. >> + maxItems: 2 >> + >> + reset-names: >> + items: >> + - const: ref >> + - const: hdp > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlow...@linaro.org> Thanks for the review, Cristian
