[PATCH 5/5] drm/i915/display: Load the lut values and enable sharpness

[Nemesa Garg]

Load the lut values during pipe enable.

v2: Add the display version check

Signed-off-by: Nemesa Garg <nemesa.g...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crtc.c    |  3 +++
 drivers/gpu/drm/i915/display/intel_display.c |  6 ++++++
 drivers/gpu/drm/i915/display/skl_scaler.c    | 13 ++++++++++++-
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c 
b/drivers/gpu/drm/i915/display/intel_crtc.c
index 968fa61af9ee..05f8d4b61ca5 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -483,6 +483,9 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum 
pipe pipe)
 
        drm_WARN_ON(&dev_priv->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
 
+       if (DISPLAY_VER(dev_priv) >= 20)
+               drm_crtc_create_sharpness_strength_property(&crtc->base);
+
        return 0;
 
 fail:
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 4c734c557ea8..7ccfb90e7c82 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1774,6 +1774,9 @@ static void hsw_crtc_enable(struct intel_atomic_state 
*state,
                        intel_crtc_wait_for_next_vblank(wa_crtc);
                }
        }
+
+       if (new_crtc_state->hw.casf_params.strength_changed)
+               intel_filter_lut_load(crtc, new_crtc_state);
 }
 
 void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state)
@@ -6971,6 +6974,9 @@ static void intel_pre_update_crtc(struct 
intel_atomic_state *state,
                        intel_vrr_set_transcoder_timings(new_crtc_state);
        }
 
+       if (intel_sharpness_strength_changed(state))
+               intel_sharpness_filter_enable(new_crtc_state);
+
        intel_fbc_update(state, crtc);
 
        drm_WARN_ON(&i915->drm, !intel_display_power_is_enabled(i915, 
POWER_DOMAIN_DC_OFF));
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c 
b/drivers/gpu/drm/i915/display/skl_scaler.c
index 9d8bc6c0ab2c..be0ad6ce90b2 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -931,7 +931,7 @@ void skl_scaler_get_config(struct intel_crtc_state 
*crtc_state)
 
        /* find scaler attached to this pipe */
        for (i = 0; i < crtc->num_scalers; i++) {
-               u32 ctl, pos, size;
+               u32 ctl, pos, size, sharp;
 
                ctl = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
                if ((ctl & (PS_SCALER_EN | PS_BINDING_MASK)) != (PS_SCALER_EN | 
PS_BINDING_PIPE))
@@ -939,6 +939,17 @@ void skl_scaler_get_config(struct intel_crtc_state 
*crtc_state)
 
                id = i;
 
+               if (DISPLAY_VER(dev_priv) >= 20) {
+                       sharp = intel_de_read(dev_priv, 
SHARPNESS_CTL(crtc->pipe));
+                       if (sharp & FILTER_EN) {
+                               crtc_state->hw.casf_params.strength =
+                                       REG_FIELD_GET(FILTER_STRENGTH_MASK, 
sharp) - 16;
+                               crtc_state->hw.casf_params.need_scaler = true;
+                               crtc_state->hw.casf_params.win_size =
+                                       REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
+                       }
+               }
+
                if (!crtc_state->hw.casf_params.need_scaler)
                        crtc_state->pch_pfit.enabled = true;
 
-- 
2.25.1