tree: git://anongit.freedesktop.org/drm-intel for-linux-next-gt head: 05da7d9f717bcb03c457379fa8a61c1689dab86c commit: 05da7d9f717bcb03c457379fa8a61c1689dab86c [3/3] drm/i915/gem: Downgrade stolen lmem setup warning config: x86_64-randconfig-122-20240614 (https://download.01.org/0day-ci/archive/20240615/202406150232.r9of4ebo-...@intel.com/config) compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240615/202406150232.r9of4ebo-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <l...@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202406150232.r9of4ebo-...@intel.com/ sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/i915/gem/i915_gem_stolen.c:943:32: sparse: sparse: Using >> plain integer as NULL pointer vim +943 drivers/gpu/drm/i915/gem/i915_gem_stolen.c 889 890 struct intel_memory_region * 891 i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type, 892 u16 instance) 893 { 894 struct intel_uncore *uncore = &i915->uncore; 895 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 896 resource_size_t dsm_size, dsm_base, lmem_size; 897 struct intel_memory_region *mem; 898 resource_size_t io_start, io_size; 899 resource_size_t min_page_size; 900 int ret; 901 902 if (WARN_ON_ONCE(instance)) 903 return ERR_PTR(-ENODEV); 904 905 if (!i915_pci_resource_valid(pdev, GEN12_LMEM_BAR)) 906 return ERR_PTR(-ENXIO); 907 908 if (HAS_LMEMBAR_SMEM_STOLEN(i915) || IS_DG1(i915)) { 909 lmem_size = pci_resource_len(pdev, GEN12_LMEM_BAR); 910 } else { 911 resource_size_t lmem_range; 912 913 lmem_range = intel_gt_mcr_read_any(to_gt(i915), XEHP_TILE0_ADDR_RANGE) & 0xFFFF; 914 lmem_size = lmem_range >> XEHP_TILE_LMEM_RANGE_SHIFT; 915 lmem_size *= SZ_1G; 916 } 917 918 if (HAS_LMEMBAR_SMEM_STOLEN(i915)) { 919 /* 920 * MTL dsm size is in GGC register. 921 * Also MTL uses offset to GSMBASE in ptes, so i915 922 * uses dsm_base = 8MBs to setup stolen region, since 923 * DSMBASE = GSMBASE + 8MB. 924 */ 925 ret = mtl_get_gms_size(uncore); 926 if (ret < 0) { 927 drm_err(&i915->drm, "invalid MTL GGC register setting\n"); 928 return ERR_PTR(ret); 929 } 930 931 dsm_base = SZ_8M; 932 dsm_size = (resource_size_t)(ret * SZ_1M); 933 934 GEM_BUG_ON(pci_resource_len(pdev, GEN12_LMEM_BAR) != SZ_256M); 935 GEM_BUG_ON((dsm_base + dsm_size) > lmem_size); 936 } else { 937 /* Use DSM base address instead for stolen memory */ 938 dsm_base = intel_uncore_read64(uncore, GEN6_DSMBASE) & GEN11_BDSM_MASK; 939 if (lmem_size < dsm_base) { 940 drm_dbg(&i915->drm, 941 "Disabling stolen memory support due to OOB placement: lmem_size = %lli vs dsm_base = %lli\n", 942 lmem_size, dsm_base); > 943 return 0; 944 } 945 dsm_size = ALIGN_DOWN(lmem_size - dsm_base, SZ_1M); 946 } 947 948 if (i915_direct_stolen_access(i915)) { 949 drm_dbg(&i915->drm, "Using direct DSM access\n"); 950 io_start = intel_uncore_read64(uncore, GEN6_DSMBASE) & GEN11_BDSM_MASK; 951 io_size = dsm_size; 952 } else if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) { 953 io_start = 0; 954 io_size = 0; 955 } else { 956 io_start = pci_resource_start(pdev, GEN12_LMEM_BAR) + dsm_base; 957 io_size = dsm_size; 958 } 959 960 min_page_size = HAS_64K_PAGES(i915) ? I915_GTT_PAGE_SIZE_64K : 961 I915_GTT_PAGE_SIZE_4K; 962 963 mem = intel_memory_region_create(i915, dsm_base, dsm_size, 964 min_page_size, 965 io_start, io_size, 966 type, instance, 967 &i915_region_stolen_lmem_ops); 968 if (IS_ERR(mem)) 969 return mem; 970 971 intel_memory_region_set_name(mem, "stolen-local"); 972 973 mem->private = true; 974 975 return mem; 976 } 977 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
