From: Hsiao Chien Sung <shawn.s...@mediatek.com>

When 9-bit alpha is enabled, its value will be converted from 0-255 to
0-256 (255 = not defined). This is designed for special HDR related
calculation, which should be disabled by default, otherwise, alpha
blending will not work correctly.

Reviewed-by: AngeloGioacchino Del Regno 
<angelogioacchino.delre...@collabora.com>
Signed-off-by: Hsiao Chien Sung <shawn.s...@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_ethdr.c | 3 +--
 drivers/soc/mediatek/mtk-mmsys.c     | 1 +
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c 
b/drivers/gpu/drm/mediatek/mtk_ethdr.c
index ac4132210585..29673611fa75 100644
--- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
+++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
@@ -50,7 +50,6 @@
 
 #define MIXER_INX_MODE_BYPASS                  0
 #define MIXER_INX_MODE_EVEN_EXTEND             1
-#define DEFAULT_9BIT_ALPHA                     0x100
 #define        MIXER_ALPHA_AEN                         BIT(8)
 #define        MIXER_ALPHA                             0xff
 #define ETHDR_CLK_NUM                          13
@@ -169,7 +168,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned 
int idx,
                alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA;
 
        mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? false : 
true,
-                                 DEFAULT_9BIT_ALPHA,
+                                 MIXER_ALPHA,
                                  pending->x & 1 ? MIXER_INX_MODE_EVEN_EXTEND :
                                  MIXER_INX_MODE_BYPASS, align_width / 2 - 1, 
cmdq_pkt);
 
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index afb2c40c85c1..00eff18a3bce 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -236,6 +236,7 @@ void mtk_mmsys_mixer_in_config(struct device *dev, int idx, 
bool alpha_sel, u16
 
        mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_ALPHA + (idx - 1) * 
4, ~0,
                              alpha << 16 | alpha, cmdq_pkt);
+       mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(15 + idx), 0, 
cmdq_pkt);
        mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(19 + idx),
                              alpha_sel << (19 + idx), cmdq_pkt);
        mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1) * 4,
-- 
2.18.0

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