The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, which fits in nicely with
the existing panel-boe-tv101wum-nl6 driver. Hence, we add a new compatible
with panel specific config.
Signed-off-by: Cong Yang <yangco...@huaqin.corp-partner.google.com>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 98 +++++++++++++++++++
1 file changed, 98 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index f91827e1548c..201a82415e1e 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1453,6 +1453,72 @@ static const struct panel_init_cmd
boe_nv110wum_init_cmd[] = {
_INIT_DELAY_CMD(25),
{},
};
+
+static const struct panel_init_cmd ivo_t109nw41_init_cmd[] = {
+ _INIT_DELAY_CMD(60),
+ _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+ _INIT_DCS_CMD(0xB1, 0x2C, 0xED, 0xED, 0x27, 0xE7, 0x42, 0xF5, 0x39,
0x36, 0x36, 0x36, 0x36, 0x32, 0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF,
0x8F, 0xFF, 0x08, 0xD6, 0x33),
+ _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x71, 0x3C,
0xA3, 0x22, 0x20, 0x00, 0x00, 0x88, 0x01),
+ _INIT_DCS_CMD(0xB4, 0x35, 0x35, 0x43, 0x43, 0x35, 0x35, 0x30, 0x7A,
0x30, 0x7A, 0x01, 0x9D),
+ _INIT_DCS_CMD(0xB6, 0x34, 0x34, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xCD),
+ _INIT_DCS_CMD(0xBA, 0x84),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+ _INIT_DCS_CMD(0xBE, 0x20),
+ _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
+ _INIT_DCS_CMD(0xC0, 0x34, 0x34, 0x22, 0x11, 0x22, 0xA0, 0x31, 0x08,
0xF5, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0x80),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xC8, 0x97),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
+ _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x34),
+ _INIT_DCS_CMD(0xCC, 0x02, 0x03, 0x44),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xD0, 0x03),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD1, 0x07, 0x06, 0x00, 0x02, 0x04, 0x2C, 0xFF),
+ _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x08,
0x08, 0x37, 0x07, 0x64, 0x7C, 0x11, 0x11, 0x03, 0x03, 0x32, 0x10, 0x0E, 0x00,
0x0E, 0x32, 0x17, 0x97, 0x07, 0x97, 0x32,
+ 0x00, 0x02, 0x00, 0x02, 0x00, 0x00),
+ _INIT_DCS_CMD(0xD5, 0x25, 0x24, 0x25, 0x24, 0x18, 0x18, 0x18, 0x18,
0x07, 0x06, 0x07, 0x06, 0x05, 0x04, 0x05, 0x04, 0x03, 0x02, 0x03, 0x02, 0x01,
0x00, 0x01, 0x00, 0xA8, 0xA8, 0xA8, 0xA8, 0x29, 0x29, 0x29, 0x29, 0x21, 0x20,
0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD8, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA,
0xAA, 0xAA, 0xAA, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00),
+ _INIT_DCS_CMD(0xE7, 0x07, 0x10, 0x10, 0x1A, 0x26, 0x9E, 0x00, 0x4F,
0xA0, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x0A, 0x02, 0x02, 0x00, 0x33,
0x02, 0x04, 0x18, 0x01),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xB1, 0x01, 0x7F, 0x11, 0xFD),
+ _INIT_DCS_CMD(0xCB, 0x86),
+ _INIT_DCS_CMD(0xD8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA, 0xAA,
0xAA, 0xAA, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00),
+ _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x2B, 0x01, 0x7E, 0x0F, 0x7E, 0x10,
0xA0, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x02),
+ _INIT_DCS_CMD(0xBF, 0xF2),
+ _INIT_DCS_CMD(0xCB, 0x03, 0x07, 0x00, 0x10, 0x79),
+ _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xFF,
0xFF, 0xFF, 0xFA, 0xA0),
+ _INIT_DCS_CMD(0xE7, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0x00, 0x00,
0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, 0x20, 0x6E, 0x02, 0x01, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x03),
+ _INIT_DCS_CMD(0xD8, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA,
0xAA, 0xAA, 0xAA, 0xA0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xFF, 0xFF,
0xFF, 0xFA, 0xA0, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA, 0xAA, 0xAA,
0xAA, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE1, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xBA, 0x96),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xBA, 0x4F),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DELAY_CMD(50),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(110),
+ _INIT_DCS_CMD(0x29),
+ _INIT_DELAY_CMD(25),
+ {},
+};
+
static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
{
return container_of(panel, struct boe_panel, base);
@@ -1907,6 +1973,35 @@ static const struct panel_desc boe_nv110wum_desc = {
.init_cmds = boe_nv110wum_init_cmd,
.lp11_before_reset = true,
};
+
+static const struct drm_display_mode ivo_t109nw41_default_mode = {
+ .clock = 166400,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 75,
+ .hsync_end = 1200 + 75 + 20,
+ .htotal = 1200 + 75 + 20 + 55,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 115,
+ .vsync_end = 1920 + 115 + 8,
+ .vtotal = 1920 + 115 + 8 + 12,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc ivo_t109nw41_desc = {
+ .modes = &ivo_t109nw41_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 147,
+ .height_mm = 235,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = ivo_t109nw41_init_cmd,
+ .lp11_before_reset = true,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -2088,6 +2183,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "boe,nv110wum-l60",
.data = &boe_nv110wum_desc
},
+ { .compatible = "ivo,t109nw41",
+ .data = &ivo_t109nw41_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
