Re: [PATCH v5 1/4] drm/i915/gt: Disable HW load balancing for CCS

[Andi Shyti]

Hi Matt,

...

> >  #define GEN12_RCU_MODE                             _MMIO(0x14800)
> >  #define   GEN12_RCU_MODE_CCS_ENABLE                REG_BIT(0)
> > +#define   XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE       REG_BIT(1)
> 
> Nitpick: we usually order register bits in descending order.  Aside from
> that,

I can take care of it.

> Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>

Thanks!
Andi