[PATCH v2 4/6] clk: sunxi-ng: a64: Set minimum and maximum rate for PLL-MIPI

[Frank Oltmanns]

Set the minimum and maximum rate of Allwinner A64's PLL-MIPI according
to the Allwinner User Manual.

Signed-off-by: Frank Oltmanns <fr...@oltmanns.dev>
---
 drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c 
b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index df679dada792..99c2ce11da74 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -178,6 +178,8 @@ static struct ccu_nkm pll_mipi_clk = {
        .m                      = _SUNXI_CCU_DIV(0, 4),
        .max_m_n_ratio          = 3,
        .min_parent_m_ratio     = 24000000,
+       .min_rate               = 500000000,
+       .max_rate               = 1400000000,
        .common         = {
                .reg            = 0x040,
                .hw.init        = CLK_HW_INIT("pll-mipi", "pll-video0",

-- 
2.43.0