[PATCH 08/19] drm/i915/dp: Factor out intel_dp_read_dprx_caps()

[Imre Deak]

Factor out a function to read the sink's DPRX capabilities used by a
follow-up patch enabling the DP tunnel BW allocation mode.

Signed-off-by: Imre Deak <imre.d...@intel.com>
---
 .../drm/i915/display/intel_dp_link_training.c | 30 +++++++++++++++----
 .../drm/i915/display/intel_dp_link_training.h |  1 +
 2 files changed, 26 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 7b140cbf8dd31..fb84ca98bb7ab 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -162,6 +162,28 @@ static int intel_dp_init_lttpr(struct intel_dp *intel_dp, 
const u8 dpcd[DP_RECEI
        return lttpr_count;
 }
 
+int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 
dpcd[DP_RECEIVER_CAP_SIZE])
+{
+       struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+       if (intel_dp_is_edp(intel_dp))
+               return 0;
+
+       /*
+        * Detecting LTTPRs must be avoided on platforms with an AUX timeout
+        * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).
+        */
+       if (DISPLAY_VER(i915) >= 10 && !IS_GEMINILAKE(i915))
+               if (drm_dp_dpcd_probe(&intel_dp->aux,
+                                     
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV))
+                       return -EIO;
+
+       if (drm_dp_read_dpcd_caps(&intel_dp->aux, dpcd))
+               return -EIO;
+
+       return 0;
+}
+
 /**
  * intel_dp_init_lttpr_and_dprx_caps - detect LTTPR and DPRX caps, init the 
LTTPR link training mode
  * @intel_dp: Intel DP struct
@@ -192,12 +214,10 @@ int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp 
*intel_dp)
        if (!intel_dp_is_edp(intel_dp) &&
            (DISPLAY_VER(i915) >= 10 && !IS_GEMINILAKE(i915))) {
                u8 dpcd[DP_RECEIVER_CAP_SIZE];
+               int err = intel_dp_read_dprx_caps(intel_dp, dpcd);
 
-               if (drm_dp_dpcd_probe(&intel_dp->aux, 
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV))
-                       return -EIO;
-
-               if (drm_dp_read_dpcd_caps(&intel_dp->aux, dpcd))
-                       return -EIO;
+               if (err != 0)
+                       return err;
 
                lttpr_count = intel_dp_init_lttpr(intel_dp, dpcd);
        }
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h 
b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
index 2c8f2775891b0..19836a8a4f904 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
@@ -11,6 +11,7 @@
 struct intel_crtc_state;
 struct intel_dp;
 
+int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 
dpcd[DP_RECEIVER_CAP_SIZE]);
 int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
 
 void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
-- 
2.39.2